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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: maz@kernel.org, mathieu.poirier@linaro.org
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, anshuman.khandual@arm.com,
	mike.leach@linaro.org, catalin.marinas@arm.com, will@kernel.org,
	peterz@infradead.org, leo.yan@linaro.org, robh@kernel.org,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Will Deacon <will.deacon@arm.com>
Subject: [PATCH v6 03/20] arm64: Add support for trace synchronization barrier
Date: Mon,  5 Apr 2021 17:42:50 +0100	[thread overview]
Message-ID: <20210405164307.1720226-4-suzuki.poulose@arm.com> (raw)
In-Reply-To: <20210405164307.1720226-1-suzuki.poulose@arm.com>

tsb csync synchronizes the trace operation of instructions.
The instruction is a nop when FEAT_TRF is not implemented.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
 arch/arm64/include/asm/barrier.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h
index c3009b0e5239..5a8367a2b868 100644
--- a/arch/arm64/include/asm/barrier.h
+++ b/arch/arm64/include/asm/barrier.h
@@ -23,6 +23,7 @@
 #define dsb(opt)	asm volatile("dsb " #opt : : : "memory")
 
 #define psb_csync()	asm volatile("hint #17" : : : "memory")
+#define tsb_csync()	asm volatile("hint #18" : : : "memory")
 #define csdb()		asm volatile("hint #20" : : : "memory")
 
 #define spec_bar()	asm volatile(ALTERNATIVE("dsb nsh\nisb\n",		\
-- 
2.24.1


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  parent reply	other threads:[~2021-04-05 16:45 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-05 16:42 [PATCH v6 00/20] coresight: Add support for ETE and TRBE Suzuki K Poulose
2021-04-05 16:42 ` [PATCH v6 01/20] perf: aux: Add flags for the buffer format Suzuki K Poulose
2021-04-05 16:42 ` [PATCH v6 02/20] perf: aux: Add CoreSight PMU buffer formats Suzuki K Poulose
2021-04-05 16:42 ` Suzuki K Poulose [this message]
2021-04-05 16:42 ` [PATCH v6 04/20] arm64: Add TRBE definitions Suzuki K Poulose
2021-04-05 16:42 ` [PATCH v6 05/20] kvm: arm64: Handle access to TRFCR_EL1 Suzuki K Poulose
2021-04-05 16:42 ` [PATCH v6 06/20] kvm: arm64: Move SPE availability check to VCPU load Suzuki K Poulose
2021-04-08 15:14   ` Alexandru Elisei
2021-04-05 16:42 ` [PATCH v6 07/20] arm64: kvm: Enable access to TRBE support for host Suzuki K Poulose
2021-04-05 16:42 ` [PATCH v6 08/20] coresight: etm4x: Move ETM to prohibited region for disable Suzuki K Poulose
2021-04-05 16:42 ` [PATCH v6 09/20] coresight: etm-perf: Allow an event to use different sinks Suzuki K Poulose
2021-04-05 16:42 ` [PATCH v6 10/20] coresight: Do not scan for graph if none is present Suzuki K Poulose
2021-04-05 16:42 ` [PATCH v6 11/20] coresight: etm4x: Add support for PE OS lock Suzuki K Poulose
2021-04-05 16:42 ` [PATCH v6 12/20] coresight: ete: Add support for ETE sysreg access Suzuki K Poulose
2021-04-05 16:43 ` [PATCH v6 13/20] coresight: ete: Add support for ETE tracing Suzuki K Poulose
2021-04-05 16:43 ` [PATCH v6 14/20] dts: bindings: Document device tree bindings for ETE Suzuki K Poulose
2021-04-05 16:43 ` [PATCH v6 15/20] coresight: etm-perf: Handle stale output handles Suzuki K Poulose
2021-04-05 16:43 ` [PATCH v6 16/20] coresight: core: Add support for dedicated percpu sinks Suzuki K Poulose
2021-04-05 16:43 ` [PATCH v6 17/20] coresight: sink: Add TRBE driver Suzuki K Poulose
2021-04-05 16:43 ` [PATCH v6 18/20] Documentation: coresight: trbe: Sysfs ABI description Suzuki K Poulose
2021-04-05 16:43 ` [PATCH v6 19/20] Documentation: trace: Add documentation for TRBE Suzuki K Poulose
2021-04-05 16:43 ` [PATCH v6 20/20] dts: bindings: Document device tree bindings for Arm TRBE Suzuki K Poulose

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