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Wed, 07 Apr 2021 06:41:03 -0700 (PDT) Date: Wed, 7 Apr 2021 21:40:58 +0800 From: Leo Yan To: Adrian Hunter Cc: Al Grant , Arnaldo Carvalho de Melo , John Garry , Will Deacon , Mathieu Poirier , James Clark , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v2 0/7] perf arm-spe: Enable timestamp Message-ID: <20210407134058.GB585163@leoy-ThinkPad-X240s> References: <20210403072346.30430-1-leo.yan@linaro.org> <20210407131529.GA585163@leoy-ThinkPad-X240s> <0016288d-a490-f8fb-f108-0969b946494e@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <0016288d-a490-f8fb-f108-0969b946494e@intel.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210407_144107_169715_F7A2FA52 X-CRM114-Status: GOOD ( 20.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Apr 07, 2021 at 04:28:40PM +0300, Adrian Hunter wrote: > On 7/04/21 4:15 pm, Leo Yan wrote: > > Hi Al, > > > > On Tue, Apr 06, 2021 at 09:38:32AM +0000, Al Grant wrote: > > > > [...] > > > >>> This patch set is to enable timestamp for Arm SPE trace. It reads out TSC > >>> parameters from mmap page and stores into auxtrace info structure; > >> > >> Why not synthesize a PERF_RECORD_TIME_CONV - isn't that specifically to > >> capture the TSC parameters from the mmap page? If a generic mechanism > >> exists it would be better to use it, otherwise we'll have to do this again for > >> future trace formats. > > > > Good point! Actually "perf record" tool has synthesized event > > PERF_RECORD_TIME_CONV. This patch series is studying the > > implementation from Intel-PT, so the question is why the existed > > implementations (like Intel-PT, Intel-BTS) don't directly use > > PERF_RECORD_TIME_CONV for retriving TSC parameters. > > PERF_RECORD_TIME_CONV was added later because the TSC information is > needed by jitdump. Thanks for the info, Adrian. If so, it's good for Arm SPE to use PERF_RECORD_TIME_CONV for TSC parameters. Will spin patch series for this. Leo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel