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From: Vladimir Oltean <olteanv@gmail.com>
To: Michael Walle <michael@walle.cc>
Cc: Jakub Kicinski <kuba@kernel.org>,
	"David S. Miller" <davem@davemloft.net>,
	netdev@vger.kernel.org, Po Liu <po.liu@nxp.com>,
	Claudiu Manoil <claudiu.manoil@nxp.com>,
	Alex Marginean <alexandru.marginean@nxp.com>,
	Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	Russell King - ARM Linux admin <linux@armlinux.org.uk>,
	Andrew Lunn <andrew@lunn.ch>,
	Vladimir Oltean <vladimir.oltean@nxp.com>
Subject: Re: [PATCH net-next 0/5] Flow control for NXP ENETC
Date: Tue, 20 Apr 2021 17:16:50 +0300
Message-ID: <20210420141650.hiu6feeaj7zrdmco@skbuf> (raw)
In-Reply-To: <0bf4aa61dea7be0723fda2d8597644ad@walle.cc>

On Tue, Apr 20, 2021 at 04:10:34PM +0200, Michael Walle wrote:
> Hi Vladimir,
> 
> Am 2021-04-20 16:04, schrieb Vladimir Oltean:
> > On Tue, Apr 20, 2021 at 03:27:24PM +0200, Michael Walle wrote:
> > > Hi Vladimir,
> > > 
> > > Am 2021-04-17 01:42, schrieb Vladimir Oltean:
> > > > From: Vladimir Oltean <vladimir.oltean@nxp.com>
> > > >
> > > > This patch series contains logic for enabling the lossless mode on the
> > > > RX rings of the ENETC, and the PAUSE thresholds on the internal FIFO
> > > > memory.
> > > >
> > > > During testing it was found that, with the default FIFO configuration,
> > > > a sender which isn't persuaded by our PAUSE frames and keeps sending
> > > > will cause some MAC RX frame errors. To mitigate this, we need to ensure
> > > > that the FIFO never runs completely full, so we need to fix up a setting
> > > > that was supposed to be configured well out of reset. Unfortunately this
> > > > requires the addition of a new mini-driver.
> > > 
> > > What happens if the mini driver is not enabled? Then the fixes aren't
> > > applied and bad things happen (now with the addition of flow control),
> > > right?
> > > 
> > > I'm asking because, if you have the arm64 defconfig its not enabled.
> > > 
> > > shouldn't it be something like:
> > > 
> > > diff --git a/drivers/net/ethernet/freescale/enetc/Kconfig
> > > b/drivers/net/ethernet/freescale/enetc/Kconfig
> > > index d88f60c2bb82..cdc0ff89388a 100644
> > > --- a/drivers/net/ethernet/freescale/enetc/Kconfig
> > > +++ b/drivers/net/ethernet/freescale/enetc/Kconfig
> > > @@ -2,7 +2,7 @@
> > >  config FSL_ENETC
> > >         tristate "ENETC PF driver"
> > >         depends on PCI && PCI_MSI
> > > -       depends on FSL_ENETC_IERB || FSL_ENETC_IERB=n
> > > +       select FSL_ENETC_IERB
> > >         select FSL_ENETC_MDIO
> > >         select PHYLINK
> > >         select PCS_LYNX
> > 
> > Yes, ideally the IERB driver and the ENETC PF driver should be built in
> > the same way, or the IERB driver can be built-in and the PF driver can
> > be module. I don't know how to express this using Kconfig, sorry.
> 
> With the small patch above it is:
>  FSL_ENETC=m -> FSL_ENETC_IERB = m or y
>  FSL_ENETC=y -> FSL_ENETC_IERB = y
>  FSL_ENETC=n -> FSL_ENETC_IERB = m,y or n
> 
> Will you fix it? Should I prepare a patch?

Could you please send the patch? Thanks.

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Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-16 23:42 Vladimir Oltean
2021-04-16 23:42 ` [PATCH net-next 1/5] net: enetc: create a common enetc_pf_to_port helper Vladimir Oltean
2021-04-16 23:42 ` [PATCH net-next 2/5] dt-bindings: net: fsl: enetc: add the IERB documentation Vladimir Oltean
2021-04-16 23:42 ` [PATCH net-next 3/5] net: enetc: add a mini driver for the Integrated Endpoint Register Block Vladimir Oltean
2021-04-16 23:42 ` [PATCH net-next 4/5] arm64: dts: ls1028a: declare the Integrated Endpoint Register Block node Vladimir Oltean
2021-04-16 23:42 ` [PATCH net-next 5/5] net: enetc: add support for flow control Vladimir Oltean
2021-04-19  9:07   ` Claudiu Manoil
2021-04-19 21:04 ` [PATCH net-next 0/5] Flow control for NXP ENETC Jakub Kicinski
2021-04-19 21:49   ` Vladimir Oltean
2021-04-19 22:40 ` patchwork-bot+netdevbpf
2021-04-20 13:27 ` Michael Walle
2021-04-20 14:04   ` Vladimir Oltean
2021-04-20 14:10     ` Michael Walle
2021-04-20 14:16       ` Vladimir Oltean [this message]

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