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Sun, 25 Apr 2021 17:25:57 -0700 (PDT) Received: from leoy-ThinkPad-X240s ([116.206.101.229]) by smtp.gmail.com with ESMTPSA id y3sm10140714pjr.40.2021.04.25.17.25.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Apr 2021 17:25:56 -0700 (PDT) Date: Mon, 26 Apr 2021 08:25:51 +0800 From: Leo Yan To: Daniel Kiss Cc: mathieu.poirier@linaro.org, suzuki.poulose@arm.com, mike.leach@linaro.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, denik@google.com, Branislav Rankov Subject: Re: [PATCH 2/4] coresight: tmc-etr: Track perf handler. Message-ID: <20210426002551.GA176271@leoy-ThinkPad-X240s> References: <20210421120413.3110775-1-daniel.kiss@arm.com> <20210421120413.3110775-3-daniel.kiss@arm.com> <20210423092038.GB377091@leoy-ThinkPad-X240s> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210423092038.GB377091@leoy-ThinkPad-X240s> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210425_172603_158333_3472A3B5 X-CRM114-Status: GOOD ( 30.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Apr 23, 2021 at 05:20:38PM +0800, Leo Yan wrote: > Hi Daniel, > > On Wed, Apr 21, 2021 at 02:04:11PM +0200, Daniel Kiss wrote: > > [...] > > > diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c > > index dd19d1d1c3b38..bf9f6311d8663 100644 > > --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c > > +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c > > @@ -1511,6 +1511,12 @@ tmc_update_etr_buffer(struct coresight_device *csdev, > > goto out; > > } > > > > + /* Serve only the tracer with the right handler */ > > + if (drvdata->perf_handle != handle) { > > + spin_unlock_irqrestore(&drvdata->spinlock, flags); > > + goto out; > > + } > > + > > I have concern for this change, Let's use the system-wide tracing as > an example. > > If a system have 4 CPUs, for the perf with system wide tracing, the > tool maps the AUX ring buffers for four times, but the CoreSight > driver only allocates pages once and maps these physical pages for > four times to user space. Therefore, the perf tool in the userspace > manages 4 AUX ring buffers, every AUX ring buffer is served for one > CPU. > > The confusion between the CoreSight driver (in the kernel) and the > perf tool (in the userspace) is: there actually has only one ring > buffer for the enabled sink (let's say ETR), but there have four ring > buffer control structures, the control structure is > 'perf_event_mmap_page' which is resident in the first page for perf's > general ring buffer (please note, this ring buffer is different from > AUX ring buffer). > > IIUC, this patch only allows the first CPU which enables coresight path > to update the AUX ring buffer. This can break the case: > > - Step 1: perf tool opens ETM event; we can use the command: > > # perf record -o ${perfdata} -e cs_etm/@tmc_etr0/ -a > -- dd if=/dev/zero of=/dev/null > > - Step 2: the profiled program "dd" is firstly schedued in CPU0, so > its "perf_handle" will be assigned to "drvdata->perf_handle"; > > - Step 3: if the program "dd" is migrated to CPU1 and it never runs > on CPU0 afterwards, then this patch will prevent to update the AUX > ring buffer, due to the "drvdata->perf_handle" cannot match with > CPU1's handler. Want to clarify, this case only happens with "snapshot" mode; With Mathieu's reminding, "snapshot" mode is quite special: it creates AUX ring buffer per CPU, but when enable the tracing, if without specifying the option "-a" for system wide tracing, it only enables ETM tracer for a CPU when the profiled program is scheduled on that CPU. To avoid over complexsity, let's give this low priority and firstly focus on the system-wide tracing case. Thanks, Leo > On the other hand, I think we should change to always stick to the > same "perf_output_handle" for all CPUs, thus it can allow all CPUs > to use the same structure 'perf_event_mmap_page' for AUX ring buffer > management. > > [...] > > Thanks, > Leo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel