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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id v82sm311524pfc.211.2021.04.26.10.54.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Apr 2021 10:54:27 -0700 (PDT) Date: Mon, 26 Apr 2021 11:54:25 -0600 From: Mathieu Poirier To: Daniel Kiss Cc: suzuki.poulose@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, denik@google.com Subject: Re: [PATCH 0/4] coresight: Add ETR-PERF polling. Message-ID: <20210426175425.GA1391779@xps15> References: <20210421120413.3110775-1-daniel.kiss@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210421120413.3110775-1-daniel.kiss@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210426_185637_017880_149356CD X-CRM114-Status: GOOD ( 23.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Daniel, On Wed, Apr 21, 2021 at 02:04:09PM +0200, Daniel Kiss wrote: > This series adds a feature to ETR-PERF that sync the ETR buffer to perf > periodically. This is really handy when the system wide trace is used > because in this case the perf won't sync during the trace. In a per-thread > setup the traced program might not go to the kernel frequvently enought > to collect trace. Polling helps in both usecases. Can be used with strobing. > Tuning polling period is challanging, I'm working on an additional patch > that adds some metrics to help tune the polling period. > Suzuki and Leo have already commented on a number of problems with this set and as such I will concentrate on the general idea. Over the years we have thought long and hard about fixing the overflow issues created by the lack of interrupt when a sink gets full, installing a timer to empty the sink buffer at regular intervals is one of them. Ultimately we haven't moved forward with the idea because it requires to stop the sink when an event is active, something that introduces more trace data loss. To me this kind of interval snapshot should be achieved using Mike's new strobing feature that came bundled with the complex configuration framework, available on next-ETE-TRBE[1]. I will rebase that branch to 5.13-rc1 when it is released in a couple of weeks from now. Thanks, Mathieu PS: Always run your work through checkpatch.pl before sending a patchset for review. [1]. https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=next-ETE-TRBE > Daniel Kiss (4): > coresight: tmc-etr: Advance buffer pointer in sync buffer. > coresight: tmc-etr: Track perf handler. > coresight: etm-perf: Export etm_event_cpu_path. > coresight: Add ETR-PERF polling. > > .../testing/sysfs-bus-coresight-devices-tmc | 8 + > drivers/hwtracing/coresight/Makefile | 2 +- > .../hwtracing/coresight/coresight-etm-perf.c | 10 +- > .../hwtracing/coresight/coresight-etm-perf.h | 1 + > .../coresight/coresight-etr-perf-polling.c | 316 ++++++++++++++++++ > .../coresight/coresight-etr-perf-polling.h | 42 +++ > .../hwtracing/coresight/coresight-tmc-core.c | 2 + > .../hwtracing/coresight/coresight-tmc-etr.c | 22 +- > drivers/hwtracing/coresight/coresight-tmc.h | 2 + > 9 files changed, 401 insertions(+), 4 deletions(-) > create mode 100644 drivers/hwtracing/coresight/coresight-etr-perf-polling.c > create mode 100644 drivers/hwtracing/coresight/coresight-etr-perf-polling.h > > -- > 2.25.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel