From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FB4FC433ED for ; Fri, 7 May 2021 10:12:58 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C8CD761448 for ; Fri, 7 May 2021 10:12:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C8CD761448 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=+3zDKQJOCR20klhbVC8uVhu0owhlhpAGxTCy/pGmCQ4=; b=dxb7QK//FxVj/6cv2i7pE6w++ THvoJytLlMG2ke83puoJznaQHVIJk+R0l8/WbxpyfqfbxGxaCVw6VAeOmZHQi1J71wctsjB9OS05O vszYMXtCAOvpAjNN5FJKrsaDbfxT010067V4k9cKek/3hq6wkvX0PKeGK+V3pQwKcd43hNU27i4SC Qji6ZnTdwU3f+iQMtdgYJrTmhjTRP0n0CsE9ZCbXhj6z6a3gXemD6lYyV3hZGu5naJ2M4/o3Onsdt aLiohIxVLOyavIbmcZ7P/I589EG0bah4qqcWfKCe8ubfJR+Q8aJqsO3Ipp+ApTDd/xrJRkYHfoisk FXU8zSZlw==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lexSC-006m6e-8M; Fri, 07 May 2021 10:11:28 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lexSA-006m6D-Bw for linux-arm-kernel@desiato.infradead.org; Fri, 07 May 2021 10:11:26 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=In-Reply-To:Content-Type:MIME-Version :References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=015TEqkSJfpTHEe/Caj2EvSpAdsI+H9NPPONpCcyBZI=; b=gIF9v7b7LfZxnkNzvivS3RA7Nk tQXO00lNUGo2hPDOGnu2Dh+YJGPvteObxlo6rRR3YkWUxsInEzxuAx/9uKuYTsIqOAkFvjjgtfGDG IP4qtJ7qKdgECyyHxhwqG9NyF+IxjQlRsm2BJfDmVttEGIwvMcjbYJ6wl9ZGzA+6Jt95poj4IesqJ BPmTrWnBOu9lNvXFCZTbfFCaWGkmmGexdCzPLLCT+5KSn2U3bHfhuTDyVyfUa3ZNxnR9aOGz63JA2 oy3RSRQiu3FD44tM+PUe9gJ4MNPGAvtjjrO8wEKDEMnyYwMg8fRPHERrVeSuf/Arfhp62t3gOsgl5 2ttVBJBw==; Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lexS7-006ljq-9f for linux-arm-kernel@lists.infradead.org; Fri, 07 May 2021 10:11:24 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E1341106F; Fri, 7 May 2021 03:11:19 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.29.54]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5EA963F718; Fri, 7 May 2021 03:11:18 -0700 (PDT) Date: Fri, 7 May 2021 11:11:15 +0100 From: Mark Rutland To: Peter Collingbourne Cc: Catalin Marinas , Vincenzo Frascino , Will Deacon , Evgenii Stepanov , Andrey Konovalov , linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org Subject: Re: [PATCH] arm64: mte: initialize RGSR_EL1.SEED in __cpu_setup Message-ID: <20210507101115.GB52849@C02TD0UTHF1T.local> References: <20210507033725.1479129-1-pcc@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210507033725.1479129-1-pcc@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210507_031123_452723_CDB69CC6 X-CRM114-Status: GOOD ( 25.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Peter, On Thu, May 06, 2021 at 08:37:25PM -0700, Peter Collingbourne wrote: > A valid implementation choice for the ChooseRandomNonExcludedTag() > pseudocode function used by IRG is to behave in the same way as with > GCR_EL1.RRND=0. This would mean that RGSR_EL1.SEED is used as an LFSR > which must have a non-zero value in order for IRG to properly produce > pseudorandom numbers. However, RGSR_EL1 is reset to an UNKNOWN value > on soft reset and thus may reset to 0. Therefore we must initialize > RGSR_EL1.SEED to a non-zero value in order to ensure that IRG behaves > as expected. > > Signed-off-by: Peter Collingbourne > Cc: stable@vger.kernel.org > Link: https://linux-review.googlesource.com/id/I2b089b6c7d6f17ee37e2f0db7df5ad5bcc04526c > --- > arch/arm64/mm/proc.S | 17 +++++++++++++++-- > 1 file changed, 15 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S > index 0a48191534ff..e8e1eaee4b3f 100644 > --- a/arch/arm64/mm/proc.S > +++ b/arch/arm64/mm/proc.S > @@ -437,7 +437,7 @@ SYM_FUNC_START(__cpu_setup) > mrs x10, ID_AA64PFR1_EL1 > ubfx x10, x10, #ID_AA64PFR1_MTE_SHIFT, #4 > cmp x10, #ID_AA64PFR1_MTE > - b.lt 1f > + b.lt 2f > > /* Normal Tagged memory type at the corresponding MAIR index */ > mov x10, #MAIR_ATTR_NORMAL_TAGGED > @@ -447,6 +447,19 @@ SYM_FUNC_START(__cpu_setup) > mov x10, #(SYS_GCR_EL1_RRND | SYS_GCR_EL1_EXCL_MASK) > msr_s SYS_GCR_EL1, x10 > > + /* > + * Initialize RGSR_EL1.SEED to a non-zero value. If the implementation > + * chooses to implement GCR_EL1.RRND=1 in the same way as RRND=0 then > + * the seed will be used as an LFSR, so it should be put onto the MLS. > + */ For those of us not familiar with LFSRs, could we crib a bit from the commit message to describe why, e.g. /* * If GCR_EL1.RRND=1 is implemented the same way as RRND=0, then * RGSR_EL1.SEED must be non-zero for IRG to produce * pseudorandom numbers. As RGSR_EL1 is UNKNOWN out of reset, we * must initialize it. */ > + mrs x10, CNTVCT_EL0 > + and x10, x10, #SYS_RGSR_EL1_SEED_MASK > + cbnz x10, 1f > + mov x10, #1 > +1: To minimize the diff and make this more locally contained, we could avoid the branch and relabelling by using ANDS and CSET: mrs x10, CNTVCT_EL0 ands x10, x10, #SYS_RGSR_EL1_SEED_MASK cset x10, ne ... or we could unconditionally ORR in 1: mrs x10, CNTVCT_EL0 orr x10, x10, #1 and x10, x10, #SYS_RGSR_EL1_SEED_MASK Thanks, Mark. > + lsl x10, x10, #SYS_RGSR_EL1_SEED_SHIFT > + msr_s SYS_RGSR_EL1, x10 > + > /* clear any pending tag check faults in TFSR*_EL1 */ > msr_s SYS_TFSR_EL1, xzr > msr_s SYS_TFSRE0_EL1, xzr > @@ -454,7 +467,7 @@ SYM_FUNC_START(__cpu_setup) > /* set the TCR_EL1 bits */ > mov_q x10, TCR_KASAN_HW_FLAGS > orr tcr, tcr, x10 > -1: > +2: > #endif > tcr_clear_errata_bits tcr, x9, x5 > > -- > 2.31.1.607.g51e8a6a459-goog > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel