[PATCH] ARM: dts: ixp4xx: Create a proper expansion bus

[PATCH] ARM: dts: ixp4xx: Create a proper expansion bus

[Linus Walleij]

The IXP4xx expansion bus is 24 bits (256 MB) that is memory
mapped between 0x50000000-0x5fffffff usin a set of chip
selects. The size of the windows is 16 or 32MB defined by
the boot loader system configuration at runtime.

Create a rudimentary simple-bus and move the flash memories
to the expansion bus, inside the SoC.

Cc: Zoltan HERPAI <wigyori@uid0.hu>
Cc: Raylynn Knight <rayknight@me.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 .../boot/dts/intel-ixp42x-linksys-nslu2.dts   | 34 +++++++++++--------
 .../dts/intel-ixp43x-gateworks-gw2358.dts     | 30 ++++++++--------
 arch/arm/boot/dts/intel-ixp4xx.dtsi           | 13 +++++++
 3 files changed, 49 insertions(+), 28 deletions(-)

diff --git a/arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts b/arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts
index 8cacf035dc32..c978a47b74e5 100644
--- a/arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts
+++ b/arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts
@@ -90,24 +90,30 @@ gpio-poweroff {
 		timeout-ms = <5000>;
 	};
 
-	/* The first 16MB region on the expansion bus */
+
 	flash@50000000 {
-		compatible = "intel,ixp4xx-flash", "cfi-flash";
-		bank-width = <2>;
-		/*
-		 * 8 MB of Flash in 0x20000 byte blocks
-		 * mapped in at 0x50000000
-		 */
-		reg = <0x50000000 0x800000>;
-
-		partitions {
-			compatible = "redboot-fis";
-			/* Eraseblock at 0x7e0000 */
-			fis-index-block = <0x3f>;
-		};
 	};
 
 	soc {
+		bus@50000000 {
+			/* The first 16MB region at CS0 on the expansion bus */
+			flash@0 {
+				compatible = "intel,ixp4xx-flash", "cfi-flash";
+				bank-width = <2>;
+				/*
+				 * 8 MB of Flash in 0x20000 byte blocks
+				 * mapped in at CS0.
+				 */
+				reg = <0x00000000 0x800000>;
+
+				partitions {
+					compatible = "redboot-fis";
+					/* Eraseblock at 0x7e0000 */
+					fis-index-block = <0x3f>;
+				};
+			};
+		};
+
 		ethernet@c8009000 {
 			status = "ok";
 			queue-rx = <&qmgr 3>;
diff --git a/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts b/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
index 051478eb9aa0..a059fe581a97 100644
--- a/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
+++ b/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
@@ -76,23 +76,25 @@ pld1: pld@57 {
 		};
 	};
 
-	flash@50000000 {
-		compatible = "intel,ixp4xx-flash", "cfi-flash";
-		bank-width = <2>;
-		/*
-		 * 32 MB of Flash in 0x20000 byte blocks
-		 * mapped in at 0x50000000
-		 */
-		reg = <0x50000000 0x2000000>;
+	soc {
+		bus@50000000 {
+			flash@0 {
+				compatible = "intel,ixp4xx-flash", "cfi-flash";
+				bank-width = <2>;
+				/*
+				 * 32 MB of Flash in 0x20000 byte blocks
+				 * mapped in at CS0.
+				 */
+				reg = <0x00000000 0x2000000>;
 
-		partitions {
-			compatible = "redboot-fis";
-			/* Eraseblock at 0x1fe0000 */
-			fis-index-block = <0xff>;
+				partitions {
+					compatible = "redboot-fis";
+					/* Eraseblock at 0x1fe0000 */
+					fis-index-block = <0xff>;
+				};
+			};
 		};
-	};
 
-	soc {
 		ethernet@c800a000 {
 			status = "ok";
 			queue-rx = <&qmgr 4>;
diff --git a/arch/arm/boot/dts/intel-ixp4xx.dtsi b/arch/arm/boot/dts/intel-ixp4xx.dtsi
index 17a712e9d582..2848f8c543af 100644
--- a/arch/arm/boot/dts/intel-ixp4xx.dtsi
+++ b/arch/arm/boot/dts/intel-ixp4xx.dtsi
@@ -14,6 +14,19 @@ soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&intcon>;
 
+		/*
+		 * The IXP4xx expansion bus is a set of 16 or 32MB
+		 * windows in the 256MB space from 0x50000000 to
+		 * 0x5fffffff.
+		 */
+		bus@50000000 {
+			compatible = "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x00000000 0x50000000 0x10000000>;
+			dma-ranges = <0x00000000 0x50000000 0x10000000>;
+		};
+
 		qmgr: queue-manager@60000000 {
 			compatible = "intel,ixp4xx-ahb-queue-manager";
 			reg = <0x60000000 0x4000>;
-- 
2.30.2


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