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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>
Cc: Dave Martin <Dave.Martin@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH v2 2/3] arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state()
Date: Tue, 11 May 2021 17:04:45 +0100
Message-ID: <20210511160446.42871-3-broonie@kernel.org> (raw)
In-Reply-To: <20210511160446.42871-1-broonie@kernel.org>

This makes the code a bit clearer and as a result we can also make the
indentation more normal, there is no change to the generated code.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/kernel/entry-fpsimd.S | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S
index 7921d58427c2..dd8382e5ce82 100644
--- a/arch/arm64/kernel/entry-fpsimd.S
+++ b/arch/arm64/kernel/entry-fpsimd.S
@@ -63,11 +63,10 @@ SYM_FUNC_END(sve_set_vq)
  * and the rest zeroed. All the other SVE registers will be zeroed.
  */
 SYM_FUNC_START(sve_load_from_fpsimd_state)
-		sve_load_vq	x1, x2, x3
-		fpsimd_restore	x0, 8
- _for n, 0, 15, _sve_pfalse	\n
-		_sve_wrffr	0
-		ret
+	sve_load_vq	x1, x2, x3
+	fpsimd_restore	x0, 8
+	sve_flush_p_ffr
+	ret
 SYM_FUNC_END(sve_load_from_fpsimd_state)
 
 /* Zero all SVE registers but the first 128-bits of each vector */
-- 
2.20.1


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Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-11 16:04 [PATCH v2 0/3] arm64/sve: Trivial optimisation for 128 bit SVE vectors Mark Brown
2021-05-11 16:04 ` [PATCH v2 1/3] arm64/sve: Split _sve_flush macro into separate Z and predicate flushes Mark Brown
2021-05-12 13:40   ` Dave Martin
2021-05-11 16:04 ` Mark Brown [this message]
2021-05-12 13:40   ` [PATCH v2 2/3] arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state() Dave Martin
2021-05-11 16:04 ` [PATCH v2 3/3] arm64/sve: Skip flushing Z registers with 128 bit vectors Mark Brown
2021-05-12 13:49   ` Dave Martin
2021-05-12 14:22     ` Mark Brown
2021-05-12 16:16 ` [PATCH v2 0/3] arm64/sve: Trivial optimisation for 128 bit SVE vectors Catalin Marinas

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