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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>
Cc: Dave Martin <Dave.Martin@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH v3 1/3] arm64/sve: Split _sve_flush macro into separate Z and predicate flushes
Date: Wed, 12 May 2021 16:11:29 +0100	[thread overview]
Message-ID: <20210512151131.27877-2-broonie@kernel.org> (raw)
In-Reply-To: <20210512151131.27877-1-broonie@kernel.org>

Trivial refactoring to support further work, no change to generated code.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
---
 arch/arm64/include/asm/fpsimdmacros.h | 4 +++-
 arch/arm64/kernel/entry-fpsimd.S      | 3 ++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h
index a2563992d2dc..059204477ce6 100644
--- a/arch/arm64/include/asm/fpsimdmacros.h
+++ b/arch/arm64/include/asm/fpsimdmacros.h
@@ -213,8 +213,10 @@
 	mov	v\nz\().16b, v\nz\().16b
 .endm
 
-.macro sve_flush
+.macro sve_flush_z
  _for n, 0, 31, _sve_flush_z	\n
+.endm
+.macro sve_flush_p_ffr
  _for n, 0, 15, _sve_pfalse	\n
 		_sve_wrffr	0
 .endm
diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S
index 3ecec60d3295..7921d58427c2 100644
--- a/arch/arm64/kernel/entry-fpsimd.S
+++ b/arch/arm64/kernel/entry-fpsimd.S
@@ -72,7 +72,8 @@ SYM_FUNC_END(sve_load_from_fpsimd_state)
 
 /* Zero all SVE registers but the first 128-bits of each vector */
 SYM_FUNC_START(sve_flush_live)
-	sve_flush
+	sve_flush_z
+	sve_flush_p_ffr
 	ret
 SYM_FUNC_END(sve_flush_live)
 
-- 
2.20.1


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  reply	other threads:[~2021-05-12 15:21 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-12 15:11 [PATCH v3 0/3] arm64/sve: Trivial optimisation for 128 bit SVE vectors Mark Brown
2021-05-12 15:11 ` Mark Brown [this message]
2021-05-12 15:11 ` [PATCH v3 2/3] arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state() Mark Brown
2021-05-12 15:11 ` [PATCH v3 3/3] arm64/sve: Skip flushing Z registers with 128 bit vectors Mark Brown
2021-05-14 11:03 ` [PATCH v3 0/3] arm64/sve: Trivial optimisation for 128 bit SVE vectors Catalin Marinas
2021-05-26 22:15 ` Will Deacon

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