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Wed, 12 May 2021 15:19:54 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 33E0B61C66; Wed, 12 May 2021 15:19:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1620832792; bh=aj3PadlzVtXUF+LnioB/sNLppOw8iU9WgtTGedfTOUg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ltZ4vz+S901vSxIlohFwyMz+zoFcguKkTYSa70AXlRNlj8x+NNJf0Pg6Zrml5IRVn RecDdSPKPjjlgUVan7ifaEBBqPNRypWzRnhcBalq0TTz18qFpko5hUvZhto0pi0XeI Py1Abmzm6paAg27QMoyvNGNQKeRGigwvwYo20iSzkZp0ORXw3gnYh5yLuLYAREM7vj IjL43fNSGC/0/mX9I0aqqcT8CF+XutCm4oWHEbSRXY0woAGM2iAdjynD+D+pMh3WBd +QERpbI33rUZ6iXkwc+jXwY/1ibJXE6RrPJBYo0mblmymfMc4pvRvE7c1OniYKDk9I tnnrJR6+zQ5PQ== From: Mark Brown To: Catalin Marinas , Will Deacon Cc: Dave Martin , linux-arm-kernel@lists.infradead.org, Mark Brown Subject: [PATCH v3 2/3] arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state() Date: Wed, 12 May 2021 16:11:30 +0100 Message-Id: <20210512151131.27877-3-broonie@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210512151131.27877-1-broonie@kernel.org> References: <20210512151131.27877-1-broonie@kernel.org> MIME-Version: 1.0 X-Patch-Hashes: v=1; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This makes the code a bit clearer and as a result we can also make the indentation more normal, there is no change to the generated code. Signed-off-by: Mark Brown Reviewed-by: Dave Martin --- arch/arm64/kernel/entry-fpsimd.S | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S index 7921d58427c2..dd8382e5ce82 100644 --- a/arch/arm64/kernel/entry-fpsimd.S +++ b/arch/arm64/kernel/entry-fpsimd.S @@ -63,11 +63,10 @@ SYM_FUNC_END(sve_set_vq) * and the rest zeroed. All the other SVE registers will be zeroed. */ SYM_FUNC_START(sve_load_from_fpsimd_state) - sve_load_vq x1, x2, x3 - fpsimd_restore x0, 8 - _for n, 0, 15, _sve_pfalse \n - _sve_wrffr 0 - ret + sve_load_vq x1, x2, x3 + fpsimd_restore x0, 8 + sve_flush_p_ffr + ret SYM_FUNC_END(sve_load_from_fpsimd_state) /* Zero all SVE registers but the first 128-bits of each vector */ -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel