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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id z9sm3398791oog.25.2021.05.17.18.04.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 May 2021 18:04:39 -0700 (PDT) Received: (nullmailer pid 3562405 invoked by uid 1000); Tue, 18 May 2021 01:04:38 -0000 Date: Mon, 17 May 2021 20:04:38 -0500 From: Rob Herring To: Johan Jonker Cc: heiko@sntech.de, linus.walleij@linaro.org, kishon@ti.com, vkoul@kernel.org, jay.xu@rock-chips.com, shawn.lin@rock-chips.com, david.wu@rock-chips.com, zhangqing@rock-chips.com, huangtao@rock-chips.com, cl@rock-chips.com, linux-phy@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 1/4] dt-bindings: phy: convert rockchip-usb-phy.txt to YAML Message-ID: <20210518010438.GA3548693@robh.at.kernel.org> References: <20210512122346.9463-1-jbx6244@gmail.com> <20210512122346.9463-2-jbx6244@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210512122346.9463-2-jbx6244@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210517_180443_648816_25E71B6E X-CRM114-Status: GOOD ( 22.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, May 12, 2021 at 02:23:43PM +0200, Johan Jonker wrote: > Current dts files with Rockchip 'usbphy' nodes are manually verified. > In order to automate this process rockchip-usb-phy.txt has to be > converted to YAML. > > Add "#phy-cells", because it is a required property > by phy-provider.yaml Maybe we should relax that. Or changing the node name would solve it. > Signed-off-by: Johan Jonker > --- > .../devicetree/bindings/phy/rockchip-usb-phy.txt | 52 ------------- > .../devicetree/bindings/phy/rockchip-usb-phy.yaml | 86 ++++++++++++++++++++++ > 2 files changed, 86 insertions(+), 52 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt > create mode 100644 Documentation/devicetree/bindings/phy/rockchip-usb-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt > deleted file mode 100644 > index 4ed569046..000000000 > --- a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt > +++ /dev/null > @@ -1,52 +0,0 @@ > -ROCKCHIP USB2 PHY > - > -Required properties: > - - compatible: matching the soc type, one of > - "rockchip,rk3066a-usb-phy" > - "rockchip,rk3188-usb-phy" > - "rockchip,rk3288-usb-phy" > - - #address-cells: should be 1 > - - #size-cells: should be 0 > - > -Deprecated properties: > - - rockchip,grf : phandle to the syscon managing the "general > - register files" - phy should be a child of the GRF instead > - > -Sub-nodes: > -Each PHY should be represented as a sub-node. > - > -Sub-nodes > -required properties: > -- #phy-cells: should be 0 > -- reg: PHY configure reg address offset in GRF > - "0x320" - for PHY attach to OTG controller > - "0x334" - for PHY attach to HOST0 controller > - "0x348" - for PHY attach to HOST1 controller > - > -Optional Properties: > -- clocks : phandle + clock specifier for the phy clocks > -- clock-names: string, clock name, must be "phyclk" > -- #clock-cells: for users of the phy-pll, should be 0 > -- reset-names: Only allow the following entries: > - - phy-reset > -- resets: Must contain an entry for each entry in reset-names. > -- vbus-supply: power-supply phandle for vbus power source > - > -Example: > - > -grf: syscon@ff770000 { > - compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; > - > -... > - > - usbphy: phy { > - compatible = "rockchip,rk3288-usb-phy"; > - #address-cells = <1>; > - #size-cells = <0>; > - > - usbphy0: usb-phy0 { > - #phy-cells = <0>; > - reg = <0x320>; > - }; > - }; > -}; > diff --git a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.yaml > new file mode 100644 > index 000000000..3b6b39da0 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.yaml > @@ -0,0 +1,86 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/rockchip-usb-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip USB2.0 phy > + > +maintainers: > + - Heiko Stuebner > + > +properties: > + compatible: > + oneOf: > + - const: rockchip,rk3288-usb-phy > + - items: > + - enum: > + - rockchip,rk3066a-usb-phy > + - rockchip,rk3188-usb-phy > + - const: rockchip,rk3288-usb-phy > + > + "#phy-cells": > + const: 0 If we did add this, we'd want it to be 1 so we could identify which phy. > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 0 > + > +required: > + - compatible > + - "#phy-cells" > + - "#address-cells" > + - "#size-cells" > + > +additionalProperties: false > + > +patternProperties: > + "usb-phy@[0-9a-f]+$": > + type: object > + > + properties: > + reg: > + maxItems: 1 > + > + "#phy-cells": > + const: 0 > + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: phyclk > + > + "#clock-cells": > + const: 0 > + > + resets: > + maxItems: 1 > + > + reset-names: > + const: phy-reset > + > + vbus-supply: > + description: phandle for vbus power source > + > + required: > + - reg > + - "#phy-cells" > + > + additionalProperties: false > + > +examples: > + - | > + usbphy: usbphy { > + compatible = "rockchip,rk3288-usb-phy"; > + #phy-cells = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + usbphy0: usb-phy@320 { > + reg = <0x320>; > + #phy-cells = <0>; > + }; > + }; > -- > 2.11.0 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel