From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4DDFC433B4 for ; Thu, 20 May 2021 16:21:39 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2F1666128A for ; Thu, 20 May 2021 16:21:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2F1666128A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=OiJWxMHGRIuYjAEyWTnhb/smOZ0+p2usJRfNBkMf1H4=; b=TOCvHZZET8f6XO+bGXtwNP8K1W qe9g9SDfFR516tzP2E7lsGEKh1RqpIBvCXXwrqFoGJCap0XcnfuvdQnSBoi+g0eTqWR8vFVcHY114 eC2wYvpuGNYNdrAKgKnv0oeKO3WDJ6H5eMrjw/B56RiQNF5oahP7A5CXoC5k1rsotqa1LuFNokvrq xsh5vFAqIc+X5JQTErdMgBzkN9LBtgnL7/Acgw7tD3ehZXEWKcaxyv8K2hneYEj1MNcUjQZdFmSmd VaAPZvfB2f/MmtEAQZd7wNmS9iooTXlyKMpLXBUEZXG8FXY/ZwZefqVaorTzmhaWvIXraL9ou4FjT EdFP6/zQ==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ljlOi-001uyw-3V; Thu, 20 May 2021 16:19:44 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ljlOZ-001uxa-Py for linux-arm-kernel@desiato.infradead.org; Thu, 20 May 2021 16:19:35 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=In-Reply-To:Content-Type:MIME-Version :References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=PhbmFHZY6abSpk5Szk8m1DRFnSXSpoNf33OklC2DR3U=; b=I59DiOeVswEUZDi187Hl/Wru13 wpIspFGTiyUeOxwK8Nyp71coYQmMnpiBbEUMZHqqdPi+WOUmHf6QqchQrJkQkiKzMOrk5kP+0Cs0B OqoiLB/HdRSHp7ZYbRCeguU0hHzrC5/HzWn975uPCGHh03ZPmUdmaGBhoXp0Zl0q4CExUibYDi9t3 /kCO4/pu95OzrVhohgR9/6aMxZ8xAVx7ynjzOZo5HklH08WYf5yum/j0Eb9AHNWbwED3/RJcvvpqp 2xx1RXo/A1fULOM3/Yubu8xiuJuHbh+SZpsclz3HHox+zAuSx7H+onvyOxnVL4xhAHJr4GBkFRpej NTyvPmgw==; Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1ljlOW-00GVK8-Nd for linux-arm-kernel@lists.infradead.org; Thu, 20 May 2021 16:19:34 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2738BED1; Thu, 20 May 2021 09:19:31 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.7.235]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 698083F73B; Thu, 20 May 2021 09:19:29 -0700 (PDT) Date: Thu, 20 May 2021 17:19:26 +0100 From: Mark Rutland To: Fuad Tabba Cc: linux-arm-kernel@lists.infradead.org, will@kernel.org, catalin.marinas@arm.com, maz@kernel.org, ardb@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, robin.murphy@arm.com Subject: Re: [PATCH v3 14/18] arm64: __clean_dcache_area_pop to take end parameter instead of size Message-ID: <20210520161926.GS17233@C02TD0UTHF1T.local> References: <20210520124406.2731873-1-tabba@google.com> <20210520124406.2731873-15-tabba@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210520124406.2731873-15-tabba@google.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210520_091932_884812_90A1C1CE X-CRM114-Status: GOOD ( 18.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, May 20, 2021 at 01:44:02PM +0100, Fuad Tabba wrote: > To be consistent with other functions with similar names and > functionality in cacheflush.h, cache.S, and cachetlb.rst, change > to specify the range in terms of start and end, as opposed to > start and size. > > No functional change intended. > > Reported-by: Will Deacon > Signed-off-by: Fuad Tabba Acked-by: Mark Rutland Mark. > --- > arch/arm64/include/asm/cacheflush.h | 2 +- > arch/arm64/lib/uaccess_flushcache.c | 4 ++-- > arch/arm64/mm/cache.S | 9 ++++----- > arch/arm64/mm/flush.c | 2 +- > 4 files changed, 8 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h > index 3255878d6f30..fa5641868d65 100644 > --- a/arch/arm64/include/asm/cacheflush.h > +++ b/arch/arm64/include/asm/cacheflush.h > @@ -61,7 +61,7 @@ extern void invalidate_icache_range(unsigned long start, unsigned long end); > extern void __flush_dcache_area(unsigned long start, unsigned long end); > extern void __inval_dcache_area(unsigned long start, unsigned long end); > extern void __clean_dcache_area_poc(unsigned long start, unsigned long end); > -extern void __clean_dcache_area_pop(void *addr, size_t len); > +extern void __clean_dcache_area_pop(unsigned long start, unsigned long end); > extern void __clean_dcache_area_pou(void *addr, size_t len); > extern long __flush_cache_user_range(unsigned long start, unsigned long end); > extern void sync_icache_aliases(void *kaddr, unsigned long len); > diff --git a/arch/arm64/lib/uaccess_flushcache.c b/arch/arm64/lib/uaccess_flushcache.c > index c83bb5a4aad2..62ea989effe8 100644 > --- a/arch/arm64/lib/uaccess_flushcache.c > +++ b/arch/arm64/lib/uaccess_flushcache.c > @@ -15,7 +15,7 @@ void memcpy_flushcache(void *dst, const void *src, size_t cnt) > * barrier to order the cache maintenance against the memcpy. > */ > memcpy(dst, src, cnt); > - __clean_dcache_area_pop(dst, cnt); > + __clean_dcache_area_pop((unsigned long)dst, (unsigned long)dst + cnt); > } > EXPORT_SYMBOL_GPL(memcpy_flushcache); > > @@ -33,6 +33,6 @@ unsigned long __copy_user_flushcache(void *to, const void __user *from, > rc = raw_copy_from_user(to, from, n); > > /* See above */ > - __clean_dcache_area_pop(to, n - rc); > + __clean_dcache_area_pop((unsigned long)to, (unsigned long)to + n - rc); > return rc; > } > diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S > index 9a9c44bb26d2..b72fbae4b8e9 100644 > --- a/arch/arm64/mm/cache.S > +++ b/arch/arm64/mm/cache.S > @@ -201,16 +201,15 @@ SYM_FUNC_END_PI(__clean_dcache_area_poc) > SYM_FUNC_END(__dma_clean_area) > > /* > - * __clean_dcache_area_pop(kaddr, size) > + * __clean_dcache_area_pop(start, end) > * > - * Ensure that any D-cache lines for the interval [kaddr, kaddr+size) > + * Ensure that any D-cache lines for the interval [start, end) > * are cleaned to the PoP. > * > - * - kaddr - kernel address > - * - size - size in question > + * - start - virtual start address of region > + * - end - virtual end address of region > */ > SYM_FUNC_START_PI(__clean_dcache_area_pop) > - add x1, x0, x1 > alternative_if_not ARM64_HAS_DCPOP > b __clean_dcache_area_poc > alternative_else_nop_endif > diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c > index 4e3505c2bea6..5aba7fe42d4b 100644 > --- a/arch/arm64/mm/flush.c > +++ b/arch/arm64/mm/flush.c > @@ -82,7 +82,7 @@ void arch_wb_cache_pmem(void *addr, size_t size) > { > /* Ensure order against any prior non-cacheable writes */ > dmb(osh); > - __clean_dcache_area_pop(addr, size); > + __clean_dcache_area_pop((unsigned long)addr, (unsigned long)addr + size); > } > EXPORT_SYMBOL_GPL(arch_wb_cache_pmem); > > -- > 2.31.1.751.gd2f1c929bd-goog > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel