From: Linus Walleij <linus.walleij@linaro.org>
To: linux-arm-kernel@lists.infradead.org,
Imre Kaloz <kaloz@openwrt.org>,
Krzysztof Halasa <khalasa@piap.pl>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Zoltan HERPAI <wigyori@uid0.hu>
Subject: [PATCH] ARM: dts: Fix up the IXP4xx ethernet nodes
Date: Fri, 21 May 2021 11:50:35 +0200 [thread overview]
Message-ID: <20210521095035.803366-1-linus.walleij@linaro.org> (raw)
All of IXP4xx SoCs has an EthA at 0xc800c000 so move this
from the IXP[56]x to the IXP4xx DTSI.
Then add the second ethernet port on the Cambria GW2358-4
on EthA.
Reported-by: Zoltan HERPAI <wigyori@uid0.hu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts | 13 +++++++++++++
arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi | 11 -----------
arch/arm/boot/dts/intel-ixp4xx.dtsi | 11 +++++++++++
3 files changed, 24 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts b/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
index f2b1fad7f35c..230b70b1f9d9 100644
--- a/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
+++ b/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
@@ -153,7 +153,20 @@ mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
+
+ phy2: ethernet-phy@2 {
+ reg = <2>;
+ };
};
};
+
+ ethernet@c800c000 {
+ status = "ok";
+ queue-rx = <&qmgr 2>;
+ queue-txready = <&qmgr 19>;
+ phy-mode = "rgmii";
+ phy-handle = <&phy2>;
+ intel,npe-handle = <&npe 0>;
+ };
};
};
diff --git a/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi b/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi
index 8ab19bc36dfd..fba8f86484bd 100644
--- a/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi
+++ b/arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi
@@ -36,17 +36,6 @@ i2c@c8011000 {
status = "disabled";
};
- /* This is known as EthA */
- ethernet@c800c000 {
- compatible = "intel,ixp4xx-ethernet";
- reg = <0xc800c000 0x1000>;
- status = "disabled";
- intel,npe = <0>;
- /* Dummy values that depend on firmware */
- queue-rx = <&qmgr 0>;
- queue-txready = <&qmgr 0>;
- };
-
/* This is known as EthB1 */
ethernet@c800d000 {
compatible = "intel,ixp4xx-ethernet";
diff --git a/arch/arm/boot/dts/intel-ixp4xx.dtsi b/arch/arm/boot/dts/intel-ixp4xx.dtsi
index 31371c65ad6d..528d5dc09cfc 100644
--- a/arch/arm/boot/dts/intel-ixp4xx.dtsi
+++ b/arch/arm/boot/dts/intel-ixp4xx.dtsi
@@ -136,5 +136,16 @@ ethernet@c800a000 {
queue-txready = <&qmgr 0>;
intel,npe-handle = <&npe 2>;
};
+
+ /* This is known as EthA */
+ ethernet@c800c000 {
+ compatible = "intel,ixp4xx-ethernet";
+ reg = <0xc800c000 0x1000>;
+ status = "disabled";
+ intel,npe = <0>;
+ /* Dummy values that depend on firmware */
+ queue-rx = <&qmgr 0>;
+ queue-txready = <&qmgr 0>;
+ };
};
};
--
2.31.1
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