From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76015C2B9F8 for ; Tue, 25 May 2021 18:37:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4543061409 for ; Tue, 25 May 2021 18:37:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4543061409 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zMNxEOOQP7XH0+J14viQAG3nGMrGvHeeUr9VKEQbwAo=; b=ryP3PoFZki5J6v evbzQ5o1LmvjphMgZWedgvj9zgSQFXxHXdEZXJt3314+d8bMplaO+Q51mYkijiX1cDDMgzpoQ01qU 0A9AA0ruzOq1Ql3Kh5bikbHA+jI/HHjQOlYwGJ2K60JxLY7pIlpBHSR25jHxH9+0ljcf+IHrsGFxF kLI8+XnvFwus/MFUNvfXg8HQGHvObmb9cNaWu8Za0ZTfouYQwpeF3aDit+8/hSPJnEDNtagNbTid0 g9nPQuoybCg/Urvf2jDEAInZbXpsuWTwiV3Cs0xQv6wD8ccJPyhSyzt9QyOkiuJXy4dMLWcg69v1o 4OA0NRidtdDKtVbJBEjQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1llbuV-007JHl-Pm; Tue, 25 May 2021 18:36:11 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1llbsQ-007IH1-3A for linux-arm-kernel@lists.infradead.org; Tue, 25 May 2021 18:34:03 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DEAFF1692; Tue, 25 May 2021 11:34:00 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DA1DF3F719; Tue, 25 May 2021 11:33:59 -0700 (PDT) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, james.morse@arm.com, joey.gouly@arm.com, mark.rutland@arm.com, maz@kernel.org, will@kernel.org Subject: [PATCH v3 08/20] arm64: entry: organise entry handlers consistently Date: Tue, 25 May 2021 19:32:50 +0100 Message-Id: <20210525183302.56293-9-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20210525183302.56293-1-mark.rutland@arm.com> References: <20210525183302.56293-1-mark.rutland@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210525_113402_307738_508A894F X-CRM114-Status: GOOD ( 11.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In entry.S we have two comments which distinguish EL0 and EL1 exception handlers, but the code isn't actually laid out this way, and there are a few other inconsitencies that would be good to clear up. This patch organizes the entry handers consistently: * The handlers are laid out in order of the vectors, to make them easier to navigate. * All handlers are given the same alignment, which was previously applied inconsitently. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland Reviewed-by: Joey Gouly Cc: Catalin Marinas Cc: James Morse Cc: Marc Zyngier Cc: Will Deacon --- arch/arm64/kernel/entry.S | 64 ++++++++++++++++++++++++++--------------------- 1 file changed, 35 insertions(+), 29 deletions(-) diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 8eb3a0a51413..d5005af8da52 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -623,6 +623,7 @@ SYM_CODE_START_LOCAL_NOALIGN(el1_irq) kernel_exit 1 SYM_CODE_END(el1_irq) + .align 6 SYM_CODE_START_LOCAL_NOALIGN(el1_fiq) kernel_entry 1 mov x0, sp @@ -630,6 +631,14 @@ SYM_CODE_START_LOCAL_NOALIGN(el1_fiq) kernel_exit 1 SYM_CODE_END(el1_fiq) + .align 6 +SYM_CODE_START_LOCAL_NOALIGN(el1_error) + kernel_entry 1 + mov x0, sp + bl el1_error_handler + kernel_exit 1 +SYM_CODE_END(el1_error) + /* * EL0 mode handlers. */ @@ -641,6 +650,30 @@ SYM_CODE_START_LOCAL_NOALIGN(el0_sync) b ret_to_user SYM_CODE_END(el0_sync) + .align 6 +SYM_CODE_START_LOCAL_NOALIGN(el0_irq) + kernel_entry 0 + mov x0, sp + bl el0_irq_handler + b ret_to_user +SYM_CODE_END(el0_irq) + + .align 6 +SYM_CODE_START_LOCAL_NOALIGN(el0_fiq) + kernel_entry 0 + mov x0, sp + bl el0_fiq_handler + b ret_to_user +SYM_CODE_END(el0_fiq) + + .align 6 +SYM_CODE_START_LOCAL_NOALIGN(el0_error) + kernel_entry 0 + mov x0, sp + bl el0_error_handler + b ret_to_user +SYM_CODE_END(el0_error) + #ifdef CONFIG_COMPAT .align 6 SYM_CODE_START_LOCAL_NOALIGN(el0_sync_compat) @@ -658,6 +691,7 @@ SYM_CODE_START_LOCAL_NOALIGN(el0_irq_compat) b ret_to_user SYM_CODE_END(el0_irq_compat) + .align 6 SYM_CODE_START_LOCAL_NOALIGN(el0_fiq_compat) kernel_entry 0, 32 mov x0, sp @@ -665,6 +699,7 @@ SYM_CODE_START_LOCAL_NOALIGN(el0_fiq_compat) b ret_to_user SYM_CODE_END(el0_fiq_compat) + .align 6 SYM_CODE_START_LOCAL_NOALIGN(el0_error_compat) kernel_entry 0, 32 mov x0, sp @@ -673,35 +708,6 @@ SYM_CODE_START_LOCAL_NOALIGN(el0_error_compat) SYM_CODE_END(el0_error_compat) #endif - .align 6 -SYM_CODE_START_LOCAL_NOALIGN(el0_irq) - kernel_entry 0 - mov x0, sp - bl el0_irq_handler - b ret_to_user -SYM_CODE_END(el0_irq) - -SYM_CODE_START_LOCAL_NOALIGN(el0_fiq) - kernel_entry 0 - mov x0, sp - bl el0_fiq_handler - b ret_to_user -SYM_CODE_END(el0_fiq) - -SYM_CODE_START_LOCAL(el1_error) - kernel_entry 1 - mov x0, sp - bl el1_error_handler - kernel_exit 1 -SYM_CODE_END(el1_error) - -SYM_CODE_START_LOCAL(el0_error) - kernel_entry 0 - mov x0, sp - bl el0_error_handler - b ret_to_user -SYM_CODE_END(el0_error) - /* * "slow" syscall return path. */ -- 2.11.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel