From: Fuad Tabba <tabba@google.com>
To: kvmarm@lists.cs.columbia.edu
Cc: maz@kernel.org, will@kernel.org, james.morse@arm.com,
alexandru.elisei@arm.com, suzuki.poulose@arm.com,
mark.rutland@arm.com, christoffer.dall@arm.com,
pbonzini@redhat.com, qperret@google.com, kvm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kernel-team@android.com,
tabba@google.com
Subject: [PATCH v1 01/13] KVM: arm64: Remove trailing whitespace in comments
Date: Tue, 8 Jun 2021 15:11:29 +0100 [thread overview]
Message-ID: <20210608141141.997398-2-tabba@google.com> (raw)
In-Reply-To: <20210608141141.997398-1-tabba@google.com>
Editing this file later, and my editor always cleans up trailing
whitespace. Removing it earler for clearer future patches.
No functional change intended.
Signed-off-by: Fuad Tabba <tabba@google.com>
---
arch/arm64/kvm/sys_regs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 1a7968ad078c..15c247fc9f0c 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -318,14 +318,14 @@ static bool trap_dbgauthstatus_el1(struct kvm_vcpu *vcpu,
/*
* We want to avoid world-switching all the DBG registers all the
* time:
- *
+ *
* - If we've touched any debug register, it is likely that we're
* going to touch more of them. It then makes sense to disable the
* traps and start doing the save/restore dance
* - If debug is active (DBG_MDSCR_KDE or DBG_MDSCR_MDE set), it is
* then mandatory to save/restore the registers, as the guest
* depends on them.
- *
+ *
* For this, we use a DIRTY bit, indicating the guest has modified the
* debug registers, used as follow:
*
--
2.32.0.rc1.229.g3e70b5a671-goog
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next prev parent reply other threads:[~2021-06-08 14:17 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-08 14:11 [PATCH v1 00/13] KVM: arm64: Fixed features for protected VMs Fuad Tabba
2021-06-08 14:11 ` Fuad Tabba [this message]
2021-06-08 14:11 ` [PATCH v1 02/13] KVM: arm64: MDCR_EL2 is a 64-bit register Fuad Tabba
2021-06-08 14:11 ` [PATCH v1 03/13] KVM: arm64: Fix name of HCR_TACR to match the spec Fuad Tabba
2021-06-08 14:11 ` [PATCH v1 04/13] KVM: arm64: Refactor sys_regs.h,c for nVHE reuse Fuad Tabba
2021-06-08 14:11 ` [PATCH v1 05/13] KVM: arm64: Restore mdcr_el2 from vcpu Fuad Tabba
2021-06-08 14:11 ` [PATCH v1 06/13] KVM: arm64: Add feature register flag definitions Fuad Tabba
2021-06-08 14:11 ` [PATCH v1 07/13] KVM: arm64: Add config register bit definitions Fuad Tabba
2021-06-08 14:11 ` [PATCH v1 08/13] KVM: arm64: Guest exit handlers for nVHE hyp Fuad Tabba
2021-06-08 14:11 ` [PATCH v1 09/13] KVM: arm64: Add trap handlers for protected VMs Fuad Tabba
2021-06-08 14:11 ` [PATCH v1 10/13] KVM: arm64: Move sanitized copies of CPU features Fuad Tabba
2021-06-08 14:11 ` [PATCH v1 11/13] KVM: arm64: Trap access to pVM restricted features Fuad Tabba
2021-06-08 14:11 ` [PATCH v1 12/13] KVM: arm64: Handle protected guests at 32 bits Fuad Tabba
2021-06-08 14:11 ` [PATCH v1 13/13] KVM: arm64: Check vcpu features at pVM creation Fuad Tabba
2021-06-08 15:07 ` [PATCH v1 00/13] KVM: arm64: Fixed features for protected VMs Andrew Jones
2021-06-09 15:22 ` Fuad Tabba
2021-06-11 12:44 ` Alexandru Elisei
2021-06-13 16:12 ` Fuad Tabba
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