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Tue, 20 Jul 2021 09:39:59 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 20 Jul 2021 09:39:59 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16KEdxNj117037; Tue, 20 Jul 2021 09:39:59 -0500 Date: Tue, 20 Jul 2021 09:39:59 -0500 From: Nishanth Menon To: Aswath Govindraju CC: Marc Kleine-Budde , , , , Tero Kristo , Rob Herring , Lokesh Vutla Subject: Re: [PATCH 1/6] arm64: dts: ti: k3-am65-mcu: Add Support for MCAN Message-ID: <20210720143959.6zmfo6pmrkpzkpse@repaint> References: <20210720141642.24999-1-a-govindraju@ti.com> <20210720141642.24999-2-a-govindraju@ti.com> <20210720142047.mfqssyj4lwh3yi2k@pengutronix.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210720_074001_459108_895DD3AA X-CRM114-Status: GOOD ( 18.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 20:00-20210720, Aswath Govindraju wrote: > Hi Marc, > > On 20/07/21 7:50 pm, Marc Kleine-Budde wrote: > > On 20.07.2021 19:46:37, Aswath Govindraju wrote: > >> From: Faiz Abbas > >> > >> Add Support for two MCAN controllers present on the am65x SOC. Both support > >> classic CAN messages as well as CAN-FD. > > > > Thanks for the patch! > > > > Why don't you disable the CAN cores by default in the dtsi? > > As far as I know, in the dtsi file we mention all the subsystems or > periherals present in the SoC and in the specific board dts file we > enable or disable the DT nodes depending on whether the pins are > brought out. There is a long history on this. You should be able to look the discussion up in lore archives. The nutshell is the dtsi files should maintain DT standard which is "default, status if not explicitly provided is enabled" and the board dts files will explicitly disable OR reserve the nodes that are not pinned out / used / reserved (due to firmware usage) etc. There is the entire string parsing, size arguments that run around this topic, but, anyways. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel