From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7A55C4338F for ; Mon, 9 Aug 2021 15:00:48 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6272C6101D for ; Mon, 9 Aug 2021 15:00:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 6272C6101D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0+NrdGId2qiV8Qj4jum0NKOA3RzSGud4ttl1Q/HfCvU=; b=yl5fGk3pUgFsIO DXl2zRrpNDKq0kRm6seF6yB7nTIuvHhZHPVNBTgAKSeJx115bV/X0iveZKeKodQaurwc4o7uK6N3U xx0UM3x//gGMgLPU2Px7zffCCjF6PsjaJOq0VX1F44AHdT+j8Wrs4tQStH7M6drzE5cEQnC/p4UrO 8o7HTbXdOCqPb1O+QAlVN03Rj2KpCw+DUCBEo2r1V+l8GoZubGjIxD4vyAsMJyvO+QS4TkAa3TCTl 72VrhljUHlW4AF+1ipvbuBgve3lbbN4AL2Csn2vLO5Wv+m5YKqnxDp8creuXEYqEiWttfYRtEhPHT 0ydJ35uO1Xjob3AIUCGQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mD6jU-0010qW-Bm; Mon, 09 Aug 2021 14:58:29 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mD6i2-00102v-Ay for linux-arm-kernel@lists.infradead.org; Mon, 09 Aug 2021 14:56:59 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 323F660E97; Mon, 9 Aug 2021 14:56:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1628521017; bh=G323JprWZzOyl+vO9ovexKueJS34erdid0unY4KZmOs=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=UYrRYUaUhBDq2QIa5NgjJuV38S7Y8s9Rh2CeLKEua2N95BBFmdUQnRYdttvlrSDQl 7by27EMvn+Af78JXPh2se0/F5KkvX4wRF0nU0QgdVCGm6EAU57k6jNTf4DEAGw08p9 Y35dtqPgcPScv2V0ZBO2FhT3clbJJamV9JclVpU9fzScUn2J+2OW1ET1l0kwadT/ZZ pnBylF29rtzo2KdCJzlm666k24/ezFuyCZRvSUfeUOW5KPQIFXyrm+X/MzMdgnoik9 uE5Ud3DTK0iQELvZdsJRgTslHOIun2GlLASKiodbYQ+lm1sXG5uA2ZVrSQ+ZOi7Lwu dNrmlZX44yeZA== Date: Mon, 9 Aug 2021 15:56:51 +0100 From: Will Deacon To: Rob Clark Cc: Sai Prakash Ranjan , Georgi Djakov , "Isaac J. Manjarres" , David Airlie , Akhil P Oommen , "list@263.net:IOMMU DRIVERS , Joerg Roedel , " , Linux Kernel Mailing List , Sean Paul , Jordan Crouse , Kristian H Kristensen , dri-devel , Daniel Vetter , linux-arm-msm , freedreno , Robin Murphy , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" Subject: Re: [Freedreno] [PATCH 0/3] iommu/drm/msm: Allow non-coherent masters to use system cache Message-ID: <20210809145651.GC1458@willie-the-truck> References: <20210728140052.GB22887@mms-0441> <8b2742c8891abe4fec3664730717a089@codeaurora.org> <20210802105544.GA27657@willie-the-truck> <20210802151409.GE28735@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210809_075658_474235_6C0CD3AB X-CRM114-Status: GOOD ( 37.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Aug 02, 2021 at 06:36:04PM -0700, Rob Clark wrote: > On Mon, Aug 2, 2021 at 8:14 AM Will Deacon wrote: > > > > On Mon, Aug 02, 2021 at 08:08:07AM -0700, Rob Clark wrote: > > > On Mon, Aug 2, 2021 at 3:55 AM Will Deacon wrote: > > > > > > > > On Thu, Jul 29, 2021 at 10:08:22AM +0530, Sai Prakash Ranjan wrote: > > > > > On 2021-07-28 19:30, Georgi Djakov wrote: > > > > > > On Mon, Jan 11, 2021 at 07:45:02PM +0530, Sai Prakash Ranjan wrote: > > > > > > > commit ecd7274fb4cd ("iommu: Remove unused IOMMU_SYS_CACHE_ONLY flag") > > > > > > > removed unused IOMMU_SYS_CACHE_ONLY prot flag and along with it went > > > > > > > the memory type setting required for the non-coherent masters to use > > > > > > > system cache. Now that system cache support for GPU is added, we will > > > > > > > need to set the right PTE attribute for GPU buffers to be sys cached. > > > > > > > Without this, the system cache lines are not allocated for GPU. > > > > > > > > > > > > > > So the patches in this series introduces a new prot flag IOMMU_LLC, > > > > > > > renames IO_PGTABLE_QUIRK_ARM_OUTER_WBWA to IO_PGTABLE_QUIRK_PTW_LLC > > > > > > > and makes GPU the user of this protection flag. > > > > > > > > > > > > Thank you for the patchset! Are you planning to refresh it, as it does > > > > > > not apply anymore? > > > > > > > > > > > > > > > > I was waiting on Will's reply [1]. If there are no changes needed, then > > > > > I can repost the patch. > > > > > > > > I still think you need to handle the mismatched alias, no? You're adding > > > > a new memory type to the SMMU which doesn't exist on the CPU side. That > > > > can't be right. > > > > > > > > > > Just curious, and maybe this is a dumb question, but what is your > > > concern about mismatched aliases? I mean the cache hierarchy on the > > > GPU device side (anything beyond the LLC) is pretty different and > > > doesn't really care about the smmu pgtable attributes.. > > > > If the CPU accesses a shared buffer with different attributes to those which > > the device is using then you fall into the "mismatched memory attributes" > > part of the Arm architecture. It's reasonably unforgiving (you should go and > > read it) and in some cases can apply to speculative accesses as well, but > > the end result is typically loss of coherency. > > Ok, I might have a few other sections to read first to decipher the > terminology.. > > But my understanding of LLC is that it looks just like system memory > to the CPU and GPU (I think that would make it "the point of > coherence" between the GPU and CPU?) If that is true, shouldn't it be > invisible from the point of view of different CPU mapping options? You could certainly build a system where mismatched attributes don't cause loss of coherence, but as it's not guaranteed by the architecture and the changes proposed here affect APIs which are exposed across SoCs, then I don't think it helps much. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel