From: Mark Rutland <mark.rutland@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Peter Shier <pshier@google.com>,
Raghavendra Rao Ananta <rananta@google.com>,
Ricardo Koller <ricarkol@google.com>,
Oliver Upton <oupton@google.com>, Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Linus Walleij <linus.walleij@linaro.org>,
kernel-team@android.com
Subject: Re: [PATCH 02/13] clocksource/arm_arch_timer: Extend write side of timer register accessors to u64
Date: Tue, 24 Aug 2021 17:20:54 +0100 [thread overview]
Message-ID: <20210824162054.GG96738@C02TD0UTHF1T.local> (raw)
In-Reply-To: <20210809152651.2297337-3-maz@kernel.org>
On Mon, Aug 09, 2021 at 04:26:40PM +0100, Marc Zyngier wrote:
> The various accessors for the timer sysreg and MMIO registers are
> currently hardwired to 32bit. However, we are about to introduce
> the use of the CVAL registers, which require a 64bit access.
>
> Upgrade the write side of the accessors to take a 64bit value
> (the read side is left untouched as we don't plan to ever read
> back any of these registers).
>
> No functional change expected.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
Looks good, builds cleanly, and boots fine on both arm/arm64:
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Mark.
> ---
> arch/arm/include/asm/arch_timer.h | 10 +++++-----
> arch/arm64/include/asm/arch_timer.h | 2 +-
> drivers/clocksource/arm_arch_timer.c | 10 +++++-----
> 3 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
> index 0c09afaa590d..88075c7f4bfd 100644
> --- a/arch/arm/include/asm/arch_timer.h
> +++ b/arch/arm/include/asm/arch_timer.h
> @@ -24,24 +24,24 @@ int arch_timer_arch_init(void);
> * the code. At least it does so with a recent GCC (4.6.3).
> */
> static __always_inline
> -void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
> +void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u64 val)
> {
> if (access == ARCH_TIMER_PHYS_ACCESS) {
> switch (reg) {
> case ARCH_TIMER_REG_CTRL:
> - asm volatile("mcr p15, 0, %0, c14, c2, 1" : : "r" (val));
> + asm volatile("mcr p15, 0, %0, c14, c2, 1" : : "r" ((u32)val));
> break;
> case ARCH_TIMER_REG_TVAL:
> - asm volatile("mcr p15, 0, %0, c14, c2, 0" : : "r" (val));
> + asm volatile("mcr p15, 0, %0, c14, c2, 0" : : "r" ((u32)val));
> break;
> }
> } else if (access == ARCH_TIMER_VIRT_ACCESS) {
> switch (reg) {
> case ARCH_TIMER_REG_CTRL:
> - asm volatile("mcr p15, 0, %0, c14, c3, 1" : : "r" (val));
> + asm volatile("mcr p15, 0, %0, c14, c3, 1" : : "r" ((u32)val));
> break;
> case ARCH_TIMER_REG_TVAL:
> - asm volatile("mcr p15, 0, %0, c14, c3, 0" : : "r" (val));
> + asm volatile("mcr p15, 0, %0, c14, c3, 0" : : "r" ((u32)val));
> break;
> }
> }
> diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
> index 8e3b2ac60c30..107afb721749 100644
> --- a/arch/arm64/include/asm/arch_timer.h
> +++ b/arch/arm64/include/asm/arch_timer.h
> @@ -89,7 +89,7 @@ static inline notrace u64 arch_timer_read_cntvct_el0(void)
> * the code.
> */
> static __always_inline
> -void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
> +void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u64 val)
> {
> if (access == ARCH_TIMER_PHYS_ACCESS) {
> switch (reg) {
> diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
> index 9db5c16e31e7..0b2bac3ef7ce 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -100,27 +100,27 @@ early_param("clocksource.arm_arch_timer.evtstrm", early_evtstrm_cfg);
> */
>
> static __always_inline
> -void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val,
> +void arch_timer_reg_write(int access, enum arch_timer_reg reg, u64 val,
> struct clock_event_device *clk)
> {
> if (access == ARCH_TIMER_MEM_PHYS_ACCESS) {
> struct arch_timer *timer = to_arch_timer(clk);
> switch (reg) {
> case ARCH_TIMER_REG_CTRL:
> - writel_relaxed(val, timer->base + CNTP_CTL);
> + writel_relaxed((u32)val, timer->base + CNTP_CTL);
> break;
> case ARCH_TIMER_REG_TVAL:
> - writel_relaxed(val, timer->base + CNTP_TVAL);
> + writel_relaxed((u32)val, timer->base + CNTP_TVAL);
> break;
> }
> } else if (access == ARCH_TIMER_MEM_VIRT_ACCESS) {
> struct arch_timer *timer = to_arch_timer(clk);
> switch (reg) {
> case ARCH_TIMER_REG_CTRL:
> - writel_relaxed(val, timer->base + CNTV_CTL);
> + writel_relaxed((u32)val, timer->base + CNTV_CTL);
> break;
> case ARCH_TIMER_REG_TVAL:
> - writel_relaxed(val, timer->base + CNTV_TVAL);
> + writel_relaxed((u32)val, timer->base + CNTV_TVAL);
> break;
> }
> } else {
> --
> 2.30.2
>
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next prev parent reply other threads:[~2021-08-24 16:23 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-09 15:26 [PATCH 00/13] clocksource/arm_arch_timer: Add basic ARMv8.6 support Marc Zyngier
2021-08-09 15:26 ` [PATCH 01/13] clocksource/arm_arch_timer: Drop CNT*_TVAL read accessors Marc Zyngier
2021-08-11 7:02 ` Oliver Upton
2021-08-24 16:20 ` Mark Rutland
2021-08-09 15:26 ` [PATCH 02/13] clocksource/arm_arch_timer: Extend write side of timer register accessors to u64 Marc Zyngier
2021-08-09 16:12 ` Oliver Upton
2021-08-24 16:20 ` Mark Rutland [this message]
2021-08-09 15:26 ` [PATCH 03/13] clocksource/arm_arch_timer: Move system register timer programming over to CVAL Marc Zyngier
2021-08-11 7:15 ` Oliver Upton
2021-08-24 16:21 ` Mark Rutland
2021-08-09 15:26 ` [PATCH 04/13] clocksource/arm_arch_timer: Move drop _tval from erratum function names Marc Zyngier
2021-08-09 16:16 ` Oliver Upton
2021-08-24 16:29 ` Mark Rutland
2021-08-09 15:26 ` [PATCH 05/13] clocksource/arm_arch_timer: Fix MMIO base address vs callback ordering issue Marc Zyngier
2021-08-09 16:52 ` Oliver Upton
2021-08-10 8:27 ` Marc Zyngier
2021-08-24 16:44 ` Mark Rutland
2021-08-09 15:26 ` [PATCH 06/13] clocksource/arm_arch_timer: Move MMIO timer programming over to CVAL Marc Zyngier
2021-08-09 15:26 ` [PATCH 07/13] clocksource/arm_arch_timer: Advertise 56bit timer to the core code Marc Zyngier
2021-08-09 15:26 ` [PATCH 08/13] clocksource/arm_arch_timer: Work around broken CVAL implementations Marc Zyngier
2021-08-10 12:34 ` Mark Rutland
2021-08-10 13:15 ` Marc Zyngier
2021-08-09 15:26 ` [PATCH 09/13] clocksource/arm_arch_timer: Remove any trace of the TVAL programming interface Marc Zyngier
2021-08-09 15:26 ` [PATCH 10/13] clocksource/arm_arch_timer: Drop unnecessary ISB on CVAL programming Marc Zyngier
2021-08-09 15:26 ` [PATCH 11/13] clocksource/arm_arch_timer: Fix masking for high freq counters Marc Zyngier
2021-08-09 16:45 ` Oliver Upton
2021-08-10 8:40 ` Marc Zyngier
2021-08-10 9:09 ` Oliver Upton
2021-08-09 15:26 ` [PATCH 12/13] arm64: Add a capability for FEAT_EVC Marc Zyngier
2021-08-09 16:30 ` Oliver Upton
2021-08-09 16:34 ` Oliver Upton
2021-08-09 18:02 ` Marc Zyngier
2021-08-09 18:21 ` Oliver Upton
2021-08-09 18:23 ` Oliver Upton
2021-08-09 15:26 ` [PATCH 13/13] arm64: Add CNT{P, V}CTSS_EL0 alternatives to cnt{p, v}ct_el0 Marc Zyngier
2021-08-09 16:42 ` Oliver Upton
2021-08-09 18:11 ` Marc Zyngier
2021-08-09 18:17 ` Oliver Upton
2021-08-10 7:59 ` Marc Zyngier
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