From: jason-jh.lin <jason-jh.lin@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
Jassi Brar <jassisinghbrar@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>, <hsinyi@google.com>
Cc: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<jason-jh.lin@mediatek.com>, <nancy.lin@mediatek.com>,
<singo.chang@mediatek.com>
Subject: [PATCH v6 3/5] arm64: dts: mt8195: add gce node
Date: Wed, 25 Aug 2021 17:41:18 +0800 [thread overview]
Message-ID: <20210825094120.5005-4-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20210825094120.5005-1-jason-jh.lin@mediatek.com>
Add gce node and gce alias on mt8195 dts file.
Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
---
This patch is based on [1]
[1] Add Mediatek SoC MT8195 and evaluation board dts and Makefile
- https://patchwork.kernel.org/project/linux-mediatek/patch/20210601075350.31515-2-seiya.wang@mediatek.com/
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index c146a91c6272..47c44cb77da0 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -6,6 +6,7 @@
/dts-v1/;
#include <dt-bindings/clock/mt8195-clk.h>
+#include <dt-bindings/gce/mt8195-gce.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/mt8195-power.h>
@@ -16,6 +17,11 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ gce0 = &gce0;
+ gce1 = &gce1;
+ };
+
clocks {
clk26m: oscillator0 {
compatible = "fixed-clock";
@@ -699,6 +705,22 @@
#clock-cells = <1>;
};
+ gce0: mdp_mailbox@10320000 {
+ compatible = "mediatek,mt8195-gce";
+ reg = <0 0x10320000 0 0x4000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <2>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_GCE>;
+ };
+
+ gce1: disp_mailbox@10330000 {
+ compatible = "mediatek,mt8195-gce";
+ reg = <0 0x10330000 0 0x4000>;
+ interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <2>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_GCE2>;
+ };
+
scp_adsp: syscon@10720000 {
compatible = "mediatek,mt8195-scp_adsp", "syscon";
reg = <0 0x10720000 0 0x1000>;
--
2.18.0
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next prev parent reply other threads:[~2021-08-25 9:44 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-25 9:41 [PATCH v6 0/5] Add gce support for mt8195 jason-jh.lin
2021-08-25 9:41 ` [PATCH v6 1/5] dt-bindings: mailbox: add definition " jason-jh.lin
2021-08-25 9:41 ` [PATCH v6 2/5] dt-bindings: gce: add gce header file " jason-jh.lin
2021-08-25 9:41 ` jason-jh.lin [this message]
2021-08-25 9:41 ` [PATCH v6 4/5] mailbox: cmdq: add mediatek mailbox support " jason-jh.lin
2021-08-25 9:41 ` [PATCH v6 5/5] mailbox: cmdq: add multi-gce clocks " jason-jh.lin
2021-08-30 5:34 ` [PATCH v6 0/5] Add gce " Jassi Brar
2021-08-31 7:14 ` Jason-JH Lin
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