Hi Sai, FYI, the error/warning still remains. tree: https://github.com/Xilinx/linux-xlnx master head: 45cd0074cdf1ddd710b28848e6a860b442babfcc commit: 4acfecc9eff4ac3ca4f0e9583ff253c95cd8172d [11894/12418] spi: spi-cadence-quadspi: Added support for DMA read config: parisc-randconfig-r023-20210826 (attached as .config) compiler: hppa-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/Xilinx/linux-xlnx/commit/4acfecc9eff4ac3ca4f0e9583ff253c95cd8172d git remote add xlnx https://github.com/Xilinx/linux-xlnx git fetch --no-tags xlnx master git checkout 4acfecc9eff4ac3ca4f0e9583ff253c95cd8172d # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=parisc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): In file included from drivers/spi/spi-cadence-quadspi.c:12: drivers/spi/spi-cadence-quadspi.c: In function 'cqspi_versal_indirect_read_dma': >> drivers/spi/spi-cadence-quadspi.c:1317:26: warning: implicit conversion from 'enum dma_transfer_direction' to 'enum dma_data_direction' [-Wenum-conversion] 1317 | DMA_DEV_TO_MEM); | ^~~~~~~~~~~~~~ include/linux/dma-mapping.h:384:70: note: in definition of macro 'dma_unmap_single' 384 | #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) | ^ vim +1317 drivers/spi/spi-cadence-quadspi.c 1241 1242 static int cqspi_versal_indirect_read_dma(struct cqspi_flash_pdata *f_pdata, 1243 u_char *rxbuf, loff_t from_addr, 1244 size_t n_rx) 1245 { 1246 struct cqspi_st *cqspi = f_pdata->cqspi; 1247 struct device *dev = &cqspi->pdev->dev; 1248 void __iomem *reg_base = cqspi->iobase; 1249 unsigned int rx_rem; 1250 int ret = 0; 1251 u32 reg; 1252 1253 rx_rem = n_rx % 4; 1254 cqspi->bytes_to_rx = n_rx; 1255 cqspi->bytes_to_dma = (n_rx - rx_rem); 1256 cqspi->addr = from_addr; 1257 cqspi->rxbuf = rxbuf; 1258 1259 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG); 1260 reg |= CQSPI_REG_CONFIG_DMA_MASK; 1261 writel(reg, cqspi->iobase + CQSPI_REG_CONFIG); 1262 1263 writel(from_addr, reg_base + CQSPI_REG_INDIRECTRDSTARTADDR); 1264 writel(cqspi->bytes_to_dma, reg_base + CQSPI_REG_INDIRECTRDBYTES); 1265 writel(CQSPI_REG_INDTRIG_ADDRRANGE_WIDTH, 1266 reg_base + CQSPI_REG_INDTRIG_ADDRRANGE); 1267 1268 /* Clear all interrupts. */ 1269 writel(CQSPI_IRQ_STATUS_MASK, reg_base + CQSPI_REG_IRQSTATUS); 1270 1271 /* Enable DMA done interrupt */ 1272 writel(CQSPI_REG_DMA_DST_I_EN_DONE, 1273 reg_base + CQSPI_REG_DMA_DST_I_EN); 1274 1275 /* Default DMA periph configuration */ 1276 writel(CQSPI_REG_DMA_VAL, reg_base + CQSPI_REG_DMA); 1277 1278 cqspi->dma_addr = dma_map_single(dev, rxbuf, cqspi->bytes_to_dma, 1279 DMA_FROM_DEVICE); 1280 if (dma_mapping_error(dev, cqspi->dma_addr)) { 1281 dev_err(dev, "ERR:rxdma:memory not mapped\n"); 1282 goto failrd; 1283 } 1284 /* Configure DMA Dst address */ 1285 writel(lower_32_bits(cqspi->dma_addr), 1286 reg_base + CQSPI_REG_DMA_DST_ADDR); 1287 writel(upper_32_bits(cqspi->dma_addr), 1288 reg_base + CQSPI_REG_DMA_DST_ADDR_MSB); 1289 1290 /* Configure DMA Src read address */ 1291 writel(cqspi->trigger_address, reg_base + CQSPI_REG_DMA_SRC_ADDR); 1292 1293 /* Set DMA destination size */ 1294 writel(cqspi->bytes_to_dma, reg_base + CQSPI_REG_DMA_DST_SIZE); 1295 1296 /* Set DMA destination control */ 1297 writel(CQSPI_REG_DMA_DST_CTRL_VAL, reg_base + CQSPI_REG_DMA_DST_CTRL); 1298 1299 writel(CQSPI_REG_INDIRECTRD_START_MASK, 1300 reg_base + CQSPI_REG_INDIRECTRD); 1301 1302 reinit_completion(&cqspi->transfer_complete); 1303 1304 if (!wait_for_completion_timeout(&cqspi->transfer_complete, 1305 msecs_to_jiffies(CQSPI_READ_TIMEOUT_MS))) { 1306 ret = -ETIMEDOUT; 1307 goto failrd; 1308 } 1309 1310 return 0; 1311 1312 failrd: 1313 /* Disable DMA interrupt */ 1314 writel(0x0, reg_base + CQSPI_REG_DMA_DST_I_DIS); 1315 1316 dma_unmap_single(dev, cqspi->dma_addr, cqspi->bytes_to_dma, > 1317 DMA_DEV_TO_MEM); 1318 1319 /* Cancel the indirect read */ 1320 writel(CQSPI_REG_INDIRECTWR_CANCEL_MASK, 1321 reg_base + CQSPI_REG_INDIRECTRD); 1322 1323 return ret; 1324 } 1325 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org