From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4C61C432BE for ; Mon, 30 Aug 2021 12:17:22 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8A51A61131 for ; Mon, 30 Aug 2021 12:17:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 8A51A61131 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ZHR/www31kRMwpIBbTSXnu52fNADLc5XWLNY7XR7SSE=; b=GVi2Mz7Vvz6FU/ eeWa2/cFw6R3La0gjjiYCdcyNVu27LZNj/gejWwB8etaw6gT5ZeNWIK3AOWTsnNtq3B+BMJUKiW/f pD1iQD6eZaaI+KJQjdJonGy2LsLzGq2e5yEOU0xnBn47437L1ux/NNXTbP8M/yvkW9mj+fP25GMsN 7rBSzU2Tj8B7yW7ffBdX/gD2WyngniYVqXrcZ5jJxyzKb7zh0LYWhuWc9lywEwaYvav+AINWtvJXM GPkAbro+DeFrPKmqvw+72RG7vrFJkXnkkheRbkBvt7woLgeXIQZAK/NyCxgAm+5lxjfoQWmeGeY9o 13HOUgPZGEP7SwfX1xzA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mKgCD-00HCz4-OL; Mon, 30 Aug 2021 12:15:25 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mKgC9-00HCya-KR for linux-arm-kernel@lists.infradead.org; Mon, 30 Aug 2021 12:15:23 +0000 Received: from jic23-huawei (cpc108967-cmbg20-2-0-cust86.5-4.cable.virginm.net [81.101.6.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 13367610FB; Mon, 30 Aug 2021 12:15:17 +0000 (UTC) Date: Mon, 30 Aug 2021 13:18:29 +0100 From: Jonathan Cameron To: Eugen Hristev Subject: Re: [PATCH v2 06/10] iio: adc: at91-sama5d2_adc: add helper for COR register Message-ID: <20210830131829.782546eb@jic23-huawei> In-Reply-To: <20210824115441.681253-7-eugen.hristev@microchip.com> References: <20210824115441.681253-1-eugen.hristev@microchip.com> <20210824115441.681253-7-eugen.hristev@microchip.com> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.30; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210830_051521_764425_BBD90D06 X-CRM114-Status: GOOD ( 25.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, ludovic.desroches@microchip.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 24 Aug 2021 14:54:37 +0300 Eugen Hristev wrote: > Add helper for the COR register. This helper allows to modify the COR > register, removes duplicate code and improves readability. > The COR offset is now part of the register layout. This will allow > different platform with a different offset to use the same helper. > > Signed-off-by: Eugen Hristev Nitpick inline. If this is all I find in the series I'll tidy it up whilst applying. J > --- > drivers/iio/adc/at91-sama5d2_adc.c | 40 +++++++++++++++--------------- > 1 file changed, 20 insertions(+), 20 deletions(-) > > diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c > index 23be7cec063e..bb4e5e1e3ce4 100644 > --- a/drivers/iio/adc/at91-sama5d2_adc.c > +++ b/drivers/iio/adc/at91-sama5d2_adc.c > @@ -151,8 +151,8 @@ struct at91_adc_reg_layout { > u16 CGR; > /* Channel Offset Register */ > u16 COR; > -#define AT91_SAMA5D2_COR_DIFF_OFFSET 16 > - > +/* Channel Offset Register differential offset - constant, not a register */ > + u16 COR_diff_offset; > /* Analog Control Register */ > u16 ACR; > /* Analog Control Register - Pen detect sensitivity mask */ > @@ -246,6 +246,7 @@ static const struct at91_adc_reg_layout sama5d2_layout = { > .CWR = 0x44, > .CGR = 0x48, > .COR = 0x4c, > + .COR_diff_offset = 16, > .ACR = 0x94, > .TSMR = 0xb0, > .XPOSR = 0xb4, > @@ -589,6 +590,21 @@ static unsigned int at91_adc_active_scan_mask_to_reg(struct iio_dev *indio_dev) > return mask & GENMASK(st->soc_info.platform->nr_channels, 0); > } > > +static void at91_adc_cor(struct at91_adc_state *st, > + struct iio_chan_spec const *chan) > +{ > + u32 cor, cur_cor; > + > + cor = (BIT(chan->channel) | BIT(chan->channel2)); Excessive brackets. > + > + cur_cor = at91_adc_readl(st, COR); > + cor <<= st->soc_info.platform->layout->COR_diff_offset; > + if (chan->differential) > + at91_adc_writel(st, COR, cur_cor | cor); > + else > + at91_adc_writel(st, COR, cur_cor & ~cor); > +} > + > static void at91_adc_irq_status(struct at91_adc_state *st, u32 *status, > u32 *eoc) > { > @@ -1033,8 +1049,6 @@ static int at91_adc_buffer_prepare(struct iio_dev *indio_dev) > indio_dev->num_channels) { > struct iio_chan_spec const *chan = > at91_adc_chan_get(indio_dev, bit); > - u32 cor; > - > if (!chan) > continue; > /* these channel types cannot be handled by this trigger */ > @@ -1042,16 +1056,7 @@ static int at91_adc_buffer_prepare(struct iio_dev *indio_dev) > chan->type == IIO_PRESSURE) > continue; > > - cor = at91_adc_readl(st, COR); > - > - if (chan->differential) > - cor |= (BIT(chan->channel) | BIT(chan->channel2)) << > - AT91_SAMA5D2_COR_DIFF_OFFSET; > - else > - cor &= ~(BIT(chan->channel) << > - AT91_SAMA5D2_COR_DIFF_OFFSET); > - > - at91_adc_writel(st, COR, cor); > + at91_adc_cor(st, chan); > > at91_adc_writel(st, CHER, BIT(chan->channel)); > } > @@ -1439,7 +1444,6 @@ static int at91_adc_read_info_raw(struct iio_dev *indio_dev, > struct iio_chan_spec const *chan, int *val) > { > struct at91_adc_state *st = iio_priv(indio_dev); > - u32 cor = 0; > u16 tmp_val; > int ret; > > @@ -1485,11 +1489,7 @@ static int at91_adc_read_info_raw(struct iio_dev *indio_dev, > > st->chan = chan; > > - if (chan->differential) > - cor = (BIT(chan->channel) | BIT(chan->channel2)) << > - AT91_SAMA5D2_COR_DIFF_OFFSET; > - > - at91_adc_writel(st, COR, cor); > + at91_adc_cor(st, chan); > at91_adc_writel(st, CHER, BIT(chan->channel)); > at91_adc_eoc_ena(st, chan->channel); > at91_adc_writel(st, CR, AT91_SAMA5D2_CR_START); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel