From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: mathieu.poirier@linaro.org, linux-arm-kernel@lists.infradead.org
Cc: anshuman.khandual@arm.com, mike.leach@linaro.org,
leo.yan@linaro.org, coresight@lists.linaro.org,
linux-kernel@vger.kernel.org,
Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v4 2/5] coresight: trbe: Fix handling of spurious interrupts
Date: Thu, 23 Sep 2021 15:39:16 +0100 [thread overview]
Message-ID: <20210923143919.2944311-3-suzuki.poulose@arm.com> (raw)
In-Reply-To: <20210923143919.2944311-1-suzuki.poulose@arm.com>
On a spurious IRQ, right now we disable the TRBE and then re-enable
it back, resetting the "buffer" pointers(i.e BASE, LIMIT and more
importantly WRITE) to the original pointers from the AUX handle.
This implies that we overwrite any trace that was written so far,
(by overwriting TRBPTR) while we should have ignored the IRQ.
On detecting a spurious IRQ after examining the TRBSR we simply
re-enable the TRBE without touching the other parameters.
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
drivers/hwtracing/coresight/coresight-trbe.c | 22 ++++++++------------
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
index e78800ba5b5b..47120d263639 100644
--- a/drivers/hwtracing/coresight/coresight-trbe.c
+++ b/drivers/hwtracing/coresight/coresight-trbe.c
@@ -684,20 +684,16 @@ static int arm_trbe_disable(struct coresight_device *csdev)
static void trbe_handle_spurious(struct perf_output_handle *handle)
{
- struct trbe_buf *buf = etm_perf_sink_config(handle);
+ u64 limitr = read_sysreg_s(SYS_TRBLIMITR_EL1);
- buf->trbe_limit = compute_trbe_buffer_limit(handle);
- buf->trbe_write = buf->trbe_base + PERF_IDX2OFF(handle->head, buf);
- if (buf->trbe_limit == buf->trbe_base) {
- trbe_drain_and_disable_local();
- /*
- * Just communicate trace truncation event to the user space by
- * marking it with PERF_AUX_FLAG_TRUNCATED.
- */
- perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
- return;
- }
- trbe_enable_hw(buf);
+ /*
+ * If the IRQ was spurious, simply re-enable the TRBE
+ * back without modifying the buffer parameters to
+ * retain the trace collected so far.
+ */
+ limitr |= TRBLIMITR_ENABLE;
+ write_sysreg_s(limitr, SYS_TRBLIMITR_EL1);
+ isb();
}
static void trbe_handle_overflow(struct perf_output_handle *handle)
--
2.24.1
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next prev parent reply other threads:[~2021-09-23 14:42 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-23 14:39 [PATCH v4 0/5] coresight: TRBE and Self-Hosted trace fixes Suzuki K Poulose
2021-09-23 14:39 ` [PATCH v4 1/5] coresight: trbe: irq handler: Do not disable TRBE if no action is needed Suzuki K Poulose
2021-09-23 14:39 ` Suzuki K Poulose [this message]
2021-09-23 14:39 ` [PATCH v4 3/5] coresight: trbe: Do not truncate buffer on IRQ Suzuki K Poulose
2021-09-23 14:39 ` [PATCH v4 4/5] coresight: trbe: End the AUX handle on truncation Suzuki K Poulose
2021-09-23 14:39 ` [PATCH v4 5/5] coresight: trbe: Prohibit trace before disabling TRBE Suzuki K Poulose
2021-09-23 16:55 ` [PATCH v4 0/5] coresight: TRBE and Self-Hosted trace fixes Mathieu Poirier
2021-09-23 18:07 ` Suzuki K Poulose
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