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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Shuah Khan <shuah@kernel.org>
Cc: Alan Hayward <alan.hayward@arm.com>,
	Luis Machado <luis.machado@arm.com>,
	Salil Akerkar <Salil.Akerkar@arm.com>,
	Basant Kumar Dwivedi <Basant.KumarDwivedi@arm.com>,
	Szabolcs Nagy <szabolcs.nagy@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kselftest@vger.kernel.org, Mark Brown <broonie@kernel.org>
Subject: [PATCH v1 08/38] arm64/sve: Track vector lengths for tasks in an array
Date: Thu, 30 Sep 2021 19:11:14 +0100	[thread overview]
Message-ID: <20210930181144.10029-9-broonie@kernel.org> (raw)
In-Reply-To: <20210930181144.10029-1-broonie@kernel.org>

As for SVE we will track a per task SME vector length for tasks. Convert
the existing storage for the vector length into an array and update
fpsimd_flush_task() to initialise this in a function.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/processor.h   | 44 +++++++++++--
 arch/arm64/include/asm/thread_info.h |  2 +-
 arch/arm64/kernel/fpsimd.c           | 97 ++++++++++++++++------------
 3 files changed, 95 insertions(+), 48 deletions(-)

diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index fb0608fe9ded..9b854e8196df 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -152,8 +152,8 @@ struct thread_struct {
 
 	unsigned int		fpsimd_cpu;
 	void			*sve_state;	/* SVE registers, if any */
-	unsigned int		sve_vl;		/* SVE vector length */
-	unsigned int		sve_vl_onexec;	/* SVE vl after next exec */
+	unsigned int		vl[ARM64_VEC_MAX];	/* vector length */
+	unsigned int		vl_onexec[ARM64_VEC_MAX]; /* vl after next exec */
 	unsigned long		fault_address;	/* fault info */
 	unsigned long		fault_code;	/* ESR_EL1 value */
 	struct debug_info	debug;		/* debugging */
@@ -169,15 +169,45 @@ struct thread_struct {
 	u64			sctlr_user;
 };
 
+static inline unsigned int thread_get_vl(struct thread_struct *thread,
+					 enum vec_type type)
+{
+	return thread->vl[type];
+}
+
 static inline unsigned int thread_get_sve_vl(struct thread_struct *thread)
 {
-	return thread->sve_vl;
+	return thread_get_vl(thread, ARM64_VEC_SVE);
+}
+
+unsigned int task_get_vl(const struct task_struct *task, enum vec_type type);
+void task_set_vl(struct task_struct *task, enum vec_type type,
+		 unsigned long vl);
+void task_set_vl_onexec(struct task_struct *task, enum vec_type type,
+			unsigned long vl);
+unsigned int task_get_vl_onexec(const struct task_struct *task,
+				enum vec_type type);
+
+static inline unsigned int task_get_sve_vl(const struct task_struct *task)
+{
+	return task_get_vl(task, ARM64_VEC_SVE);
 }
 
-unsigned int task_get_sve_vl(const struct task_struct *task);
-void task_set_sve_vl(struct task_struct *task, unsigned long vl);
-unsigned int task_get_sve_vl_onexec(const struct task_struct *task);
-void task_set_sve_vl_onexec(struct task_struct *task, unsigned long vl);
+static inline void task_set_sve_vl(struct task_struct *task, unsigned long vl)
+{
+	task_set_vl(task, ARM64_VEC_SVE, vl);
+}
+
+static inline unsigned int task_get_sve_vl_onexec(const struct task_struct *task)
+{
+	return task_get_vl_onexec(task, ARM64_VEC_SVE);
+}
+
+static inline void task_set_sve_vl_onexec(struct task_struct *task,
+					  unsigned long vl)
+{
+	task_set_vl_onexec(task, ARM64_VEC_SVE, vl);
+}
 
 #define SCTLR_USER_MASK                                                        \
 	(SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | SCTLR_ELx_ENDA | SCTLR_ELx_ENDB |   \
diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index 6623c99f0984..d5c8ac81ce11 100644
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h
@@ -78,7 +78,7 @@ int arch_dup_task_struct(struct task_struct *dst,
 #define TIF_SINGLESTEP		21
 #define TIF_32BIT		22	/* 32bit process */
 #define TIF_SVE			23	/* Scalable Vector Extension in use */
-#define TIF_SVE_VL_INHERIT	24	/* Inherit sve_vl_onexec across exec */
+#define TIF_SVE_VL_INHERIT	24	/* Inherit SVE vl_onexec across exec */
 #define TIF_SSBD		25	/* Wants SSB mitigation */
 #define TIF_TAGGED_ADDR		26	/* Allow tagged user addresses */
 
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 44bb3203c9d1..814080209093 100644
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -133,6 +133,17 @@ __ro_after_init struct vl_info vl_info[ARM64_VEC_MAX] = {
 #endif
 };
 
+static unsigned int vec_vl_inherit_flag(enum vec_type type)
+{
+	switch (type) {
+	case ARM64_VEC_SVE:
+		return TIF_SVE_VL_INHERIT;
+	default:
+		WARN_ON_ONCE(1);
+		return 0;
+	}
+}
+
 struct vl_config {
 	int __default_vl;		/* Default VL for tasks */
 };
@@ -239,24 +250,27 @@ static void sve_free(struct task_struct *task)
 	__sve_free(task);
 }
 
-unsigned int task_get_sve_vl(const struct task_struct *task)
+unsigned int task_get_vl(const struct task_struct *task, enum vec_type type)
 {
-	return task->thread.sve_vl;
+	return task->thread.vl[type];
 }
 
-void task_set_sve_vl(struct task_struct *task, unsigned long vl)
+void task_set_vl(struct task_struct *task, enum vec_type type,
+		 unsigned long vl)
 {
-	task->thread.sve_vl = vl;
+	task->thread.vl[type] = vl;
 }
 
-unsigned int task_get_sve_vl_onexec(const struct task_struct *task)
+unsigned int task_get_vl_onexec(const struct task_struct *task,
+				enum vec_type type)
 {
-	return task->thread.sve_vl_onexec;
+	return task->thread.vl_onexec[type];
 }
 
-void task_set_sve_vl_onexec(struct task_struct *task, unsigned long vl)
+void task_set_vl_onexec(struct task_struct *task, enum vec_type type,
+			unsigned long vl)
 {
-	task->thread.sve_vl_onexec = vl;
+	task->thread.vl_onexec[type] = vl;
 }
 
 /*
@@ -1074,10 +1088,43 @@ void fpsimd_thread_switch(struct task_struct *next)
 	__put_cpu_fpsimd_context();
 }
 
-void fpsimd_flush_thread(void)
+static void fpsimd_flush_thread_vl(enum vec_type type)
 {
 	int vl, supported_vl;
 
+	/*
+	 * Reset the task vector length as required.  This is where we
+	 * ensure that all user tasks have a valid vector length
+	 * configured: no kernel task can become a user task without
+	 * an exec and hence a call to this function.  By the time the
+	 * first call to this function is made, all early hardware
+	 * probing is complete, so __sve_default_vl should be valid.
+	 * If a bug causes this to go wrong, we make some noise and
+	 * try to fudge thread.sve_vl to a safe value here.
+	 */
+	vl = task_get_vl_onexec(current, type);
+	if (!vl)
+		vl = get_default_vl(type);
+
+	if (WARN_ON(!sve_vl_valid(vl)))
+		vl = SVE_VL_MIN;
+
+	supported_vl = find_supported_vector_length(type, vl);
+	if (WARN_ON(supported_vl != vl))
+		vl = supported_vl;
+
+	task_set_vl(current, type, vl);
+
+	/*
+	 * If the task is not set to inherit, ensure that the vector
+	 * length will be reset by a subsequent exec:
+	 */
+	if (!test_thread_flag(vec_vl_inherit_flag(type)))
+		task_set_vl_onexec(current, type, 0);
+}
+
+void fpsimd_flush_thread(void)
+{
 	if (!system_supports_fpsimd())
 		return;
 
@@ -1090,37 +1137,7 @@ void fpsimd_flush_thread(void)
 	if (system_supports_sve()) {
 		clear_thread_flag(TIF_SVE);
 		sve_free(current);
-
-		/*
-		 * Reset the task vector length as required.
-		 * This is where we ensure that all user tasks have a valid
-		 * vector length configured: no kernel task can become a user
-		 * task without an exec and hence a call to this function.
-		 * By the time the first call to this function is made, all
-		 * early hardware probing is complete, so __sve_default_vl
-		 * should be valid.
-		 * If a bug causes this to go wrong, we make some noise and
-		 * try to fudge thread.sve_vl to a safe value here.
-		 */
-		vl = task_get_sve_vl_onexec(current);
-		if (!vl)
-			vl = get_sve_default_vl();
-
-		if (WARN_ON(!sve_vl_valid(vl)))
-			vl = SVE_VL_MIN;
-
-		supported_vl = find_supported_vector_length(ARM64_VEC_SVE, vl);
-		if (WARN_ON(supported_vl != vl))
-			vl = supported_vl;
-
-		task_set_sve_vl(current, vl);
-
-		/*
-		 * If the task is not set to inherit, ensure that the vector
-		 * length will be reset by a subsequent exec:
-		 */
-		if (!test_thread_flag(TIF_SVE_VL_INHERIT))
-			task_set_sve_vl_onexec(current, 0);
+		fpsimd_flush_thread_vl(ARM64_VEC_SVE);
 	}
 
 	put_cpu_fpsimd_context();
-- 
2.20.1


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  parent reply	other threads:[~2021-09-30 18:22 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-30 18:11 [PATCH v1 00/38] arm64/sme: Initial support for the Scalable Matrix Extension Mark Brown
2021-09-30 18:11 ` [PATCH v1 01/38] arm64/fp: Reindent fpsimd_save() Mark Brown
2021-10-11  9:39   ` Jonathan Cameron
2021-10-11 13:02     ` Mark Brown
2021-09-30 18:11 ` [PATCH v1 02/38] arm64/sve: Remove sve_load_from_fpsimd_state() Mark Brown
2021-09-30 18:11 ` [PATCH v1 03/38] arm64/sve: Make access to FFR optional Mark Brown
2021-09-30 18:11 ` [PATCH v1 04/38] arm64/sve: Rename find_supported_vector_length() Mark Brown
2021-09-30 18:11 ` [PATCH v1 05/38] arm64/sve: Use accessor functions for vector lengths in thread_struct Mark Brown
2021-09-30 18:11 ` [PATCH v1 06/38] arm64/sve: Put system wide vector length information into structs Mark Brown
2021-10-01  3:13   ` kernel test robot
2021-09-30 18:11 ` [PATCH v1 07/38] arm64/sve: Explicitly load vector length when restoring SVE state Mark Brown
2021-09-30 18:11 ` Mark Brown [this message]
2021-10-11 10:20   ` [PATCH v1 08/38] arm64/sve: Track vector lengths for tasks in an array Jonathan Cameron
2021-10-11 13:14     ` Mark Brown
2021-10-11 13:18       ` Jonathan Cameron
2021-09-30 18:11 ` [PATCH v1 09/38] arm64/sve: Make sysctl interface for SVE reusable by SME Mark Brown
2021-09-30 18:11 ` [PATCH v1 10/38] arm64/sve: Generalise vector length configuration prctl() for SME Mark Brown
2021-10-11 10:27   ` Jonathan Cameron
2021-10-11 13:18     ` Mark Brown
2021-09-30 18:11 ` [PATCH v1 11/38] selftests: arm64: Parameterise ptrace vector length information Mark Brown
2021-09-30 18:11 ` [PATCH v1 12/38] arm64/sme: Provide ABI documentation for SME Mark Brown
2021-10-08 14:11   ` Alan Hayward
2021-10-08 15:28     ` Mark Brown
2021-10-08 16:45       ` Alan Hayward
2021-10-08 17:04         ` Mark Brown
2021-10-11 11:15           ` Alan Hayward
2021-10-11 11:48             ` Mark Brown
2021-10-11 11:05   ` Jonathan Cameron
2021-10-11 13:20     ` Mark Brown
2021-10-11 13:17   ` Szabolcs Nagy
2021-10-11 13:23     ` Mark Brown
2021-10-11 14:19       ` Szabolcs Nagy
2021-10-11 20:10         ` Mark Brown
2021-10-12  8:23           ` Szabolcs Nagy
2021-10-13 18:37             ` Mark Brown
2021-10-14  9:57               ` Szabolcs Nagy
2021-09-30 18:11 ` [PATCH v1 13/38] arm64/sme: System register and exception syndrome definitions Mark Brown
2021-09-30 18:11 ` [PATCH v1 14/38] arm64/sme: Define macros for manually encoding SME instructions Mark Brown
2021-09-30 18:11 ` [PATCH v1 15/38] arm64/sme: Early CPU setup for SME Mark Brown
2021-09-30 18:11 ` [PATCH v1 16/38] arm64/sme: Basic enumeration support Mark Brown
2021-09-30 18:11 ` [PATCH v1 17/38] arm64/sme: Identify supported SME vector lengths at boot Mark Brown
2021-09-30 18:11 ` [PATCH v1 18/38] arm64/sme: Implement sysctl to set the default vector length Mark Brown
2021-09-30 18:11 ` [PATCH v1 19/38] arm64/sme: Implement vector length configuration prctl()s Mark Brown
2021-10-01  5:20   ` kernel test robot
2021-10-01 12:40     ` Mark Brown
2021-10-08  1:32       ` [kbuild-all] " Chen, Rong A
2021-10-01 16:38   ` kernel test robot
2021-09-30 18:11 ` [PATCH v1 20/38] arm64/sme: Implement support for TPIDR2 Mark Brown
2021-09-30 18:11 ` [PATCH v1 21/38] arm64/sme: Implement SVCR context switching Mark Brown
2021-10-11 12:15   ` Jonathan Cameron
2021-09-30 18:11 ` [PATCH v1 22/38] arm64/sme: Implement streaming SVE " Mark Brown
2021-09-30 18:11 ` [PATCH v1 23/38] arm64/sme: Implement ZA " Mark Brown
2021-10-11 12:27   ` Jonathan Cameron
2021-09-30 18:11 ` [PATCH v1 24/38] arm64/sme: Implement traps and syscall handling for SME Mark Brown
2021-10-11 12:37   ` Jonathan Cameron
2021-09-30 18:11 ` [PATCH v1 25/38] arm64/sme: Implement streaming SVE signal handling Mark Brown
2021-09-30 18:11 ` [PATCH v1 26/38] arm64/sme: Implement ZA " Mark Brown
2021-09-30 18:11 ` [PATCH v1 27/38] arm64/sme: Implement ptrace support for streaming mode SVE registers Mark Brown
2021-09-30 18:11 ` [PATCH v1 28/38] arm64/sme: Add ptrace support for ZA Mark Brown
2021-09-30 18:11 ` [PATCH v1 29/38] arm64/sme: Disable streaming mode and ZA when flushing CPU state Mark Brown
2021-09-30 18:11 ` [PATCH v1 30/38] arm64/sme: Save and restore streaming mode over EFI runtime calls Mark Brown
2021-09-30 18:11 ` [PATCH v1 31/38] arm64/sme: Provide Kconfig for SME Mark Brown
2021-09-30 18:11 ` [PATCH v1 32/38] kselftest/arm64: Add tests for TPIDR2 Mark Brown
2021-09-30 18:11 ` [PATCH v1 33/38] kselftest/arm64: Extend vector configuration API tests to cover SME Mark Brown
2021-09-30 18:11 ` [PATCH v1 34/38] kselftest/arm64: sme: Provide streaming mode SVE stress test Mark Brown
2021-09-30 18:11 ` [PATCH v1 35/38] kselftest/arm64: Add stress test for SME ZA context switching Mark Brown
2021-09-30 18:11 ` [PATCH v1 36/38] kselftest/arm64: signal: Add SME signal handling tests Mark Brown
2021-09-30 18:11 ` [PATCH v1 37/38] selftests: arm64: Add streaming SVE to SVE ptrace tests Mark Brown
2021-09-30 18:11 ` [PATCH v1 38/38] selftests: arm64: Add coverage for the ZA ptrace interface Mark Brown

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