From: Lucas Stach <l.stach@pengutronix.de>
To: Shawn Guo <shawnguo@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Adam Ford <aford173@gmail.com>,
Frieder Schrempf <frieder.schrempf@kontron.de>,
Marek Vasut <marex@denx.de>, Tim Harvey <tharvey@gateworks.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
kernel@pengutronix.de, patchwork-lst@pengutronix.de
Subject: [PATCH v5 16/18] arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core
Date: Sat, 2 Oct 2021 02:59:52 +0200 [thread overview]
Message-ID: <20211002005954.1367653-17-l.stach@pengutronix.de> (raw)
In-Reply-To: <20211002005954.1367653-1-l.stach@pengutronix.de>
From: Frieder Schrempf <frieder.schrempf@kontron.de>
According to the documents, the i.MX8M-Mini features a GC320 and a
GCNanoUltra GPU core. Etnaviv detects them as:
etnaviv-gpu 38000000.gpu: model: GC600, revision: 4653
etnaviv-gpu 38008000.gpu: model: GC520, revision: 5341
This seems to work fine more or less without any changes to the HWDB,
which still might be needed in the future to correct some features,
etc.
[lst]: Added power domains and switched clock assignments to the
new clock defines used for the composite clocks, instead of
relying on the backwards compat defines.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 31 +++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index d8c53ffb5fff..6009e54266f0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1139,6 +1139,37 @@ gpmi: nand-controller@33002000{
status = "disabled";
};
+ gpu_3d: gpu@38000000 {
+ compatible = "vivante,gc";
+ reg = <0x38000000 0x8000>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_GPU_AHB>,
+ <&clk IMX8MM_CLK_GPU_BUS_ROOT>,
+ <&clk IMX8MM_CLK_GPU3D_ROOT>,
+ <&clk IMX8MM_CLK_GPU3D_ROOT>;
+ clock-names = "reg", "bus", "core", "shader";
+ assigned-clocks = <&clk IMX8MM_CLK_GPU3D_CORE>,
+ <&clk IMX8MM_GPU_PLL_OUT>;
+ assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>;
+ assigned-clock-rates = <0>, <1000000000>;
+ power-domains = <&pgc_gpu>;
+ };
+
+ gpu_2d: gpu@38008000 {
+ compatible = "vivante,gc";
+ reg = <0x38008000 0x8000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_GPU_AHB>,
+ <&clk IMX8MM_CLK_GPU_BUS_ROOT>,
+ <&clk IMX8MM_CLK_GPU2D_ROOT>;
+ clock-names = "reg", "bus", "core";
+ assigned-clocks = <&clk IMX8MM_CLK_GPU2D_CORE>,
+ <&clk IMX8MM_GPU_PLL_OUT>;
+ assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>;
+ assigned-clock-rates = <0>, <1000000000>;
+ power-domains = <&pgc_gpu>;
+ };
+
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>, /* GIC Dist */
--
2.30.2
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next prev parent reply other threads:[~2021-10-02 1:08 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-02 0:59 [PATCH v5 00/18] i.MX8MM GPC improvements and BLK_CTRL driver Lucas Stach
2021-10-02 0:59 ` [PATCH v5 01/18] Revert "soc: imx: gpcv2: move reset assert after requesting domain power up" Lucas Stach
2021-10-03 10:43 ` Adam Ford
2021-10-03 19:46 ` Lucas Stach
2021-10-04 0:03 ` Adam Ford
2021-10-02 0:59 ` [PATCH v5 02/18] soc: imx: gpcv2: Turn domain->pgc into bitfield Lucas Stach
2021-10-02 0:59 ` [PATCH v5 03/18] soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU domain Lucas Stach
2021-10-02 0:59 ` [PATCH v5 04/18] soc: imx: gpcv2: add lockdep annotation Lucas Stach
2021-10-02 0:59 ` [PATCH v5 05/18] soc: imx: gpcv2: add domain option to keep domain clocks enabled Lucas Stach
2021-10-02 0:59 ` [PATCH v5 06/18] soc: imx: gpcv2: keep i.MX8M* bus " Lucas Stach
2021-10-02 0:59 ` [PATCH v5 07/18] soc: imx: gpcv2: support system suspend/resume Lucas Stach
2021-12-08 13:47 ` [PATCH] hack: soc: imx: gpcv2: avoid unbalanced powering off of one device Martin Kepplinger
2021-12-08 14:05 ` Lucas Stach
2021-12-22 8:12 ` Martin Kepplinger
2021-10-02 0:59 ` [PATCH v5 08/18] dt-bindings: soc: add binding for i.MX8MM VPU blk-ctrl Lucas Stach
2021-10-02 0:59 ` [PATCH v5 09/18] dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains Lucas Stach
2021-10-02 0:59 ` [PATCH v5 10/18] soc: imx: add i.MX8M blk-ctrl driver Lucas Stach
2021-10-02 0:59 ` [PATCH v5 11/18] dt-bindings: soc: add binding for i.MX8MM DISP blk-ctrl Lucas Stach
2021-10-02 0:59 ` [PATCH v5 12/18] dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains Lucas Stach
2021-10-02 0:59 ` [PATCH v5 13/18] soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl Lucas Stach
2021-10-02 0:59 ` [PATCH v5 14/18] arm64: dts: imx8mm: add GPC node Lucas Stach
2021-10-02 0:59 ` [PATCH v5 15/18] arm64: dts: imx8mm: put USB controllers into power-domains Lucas Stach
2021-10-02 0:59 ` Lucas Stach [this message]
2021-10-02 0:59 ` [PATCH v5 17/18] arm64: dts: imx8mm: add VPU blk-ctrl Lucas Stach
2021-10-02 0:59 ` [PATCH v5 18/18] arm64: dts: imx8mm: add DISP blk-ctrl Lucas Stach
2021-10-05 6:40 ` [PATCH v5 00/18] i.MX8MM GPC improvements and BLK_CTRL driver Shawn Guo
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