From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A7B48C433EF for ; Mon, 6 Dec 2021 16:49:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=qFaYEqh/PPTE/rJEhJ5al4bHq3Um8tkReVcMRJ+4zsU=; b=OUiTzSuh/MWT66 xXQjdtj+8y321SAoms0C2kM8KlJq+CDTHDqtALEY9QcHlQvBRv6yIqDbmUKPZnGoUDhUDtU9curqJ Y9Rq2xhERGtnAIlvVLrDuCG9OprtCXEHIpDowYZU97bF7qBepzwKeCRrYnUcnj6N7CA5NtlleEN/d 0LADVgNtegmORLd6p1Kvoe+sXdP6sxcw7lUyCmyHw4wyz0kd+W4HtFbN4mBqZAkQcgx0u3XHDKd54 5Sq53ZB8d7bAYMnXOa2U4D4/362BlT7TopAGFoOX6+ZRu8u4j31Aaa8ji69eiahIqGB9VxxY6cdbS 05GcAuls423j0aoIl1sQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1muH9N-004qeF-6z; Mon, 06 Dec 2021 16:47:37 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1muH97-004qZJ-5X for linux-arm-kernel@lists.infradead.org; Mon, 06 Dec 2021 16:47:23 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id C56A7B81174; Mon, 6 Dec 2021 16:47:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 87EAEC341C6; Mon, 6 Dec 2021 16:47:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638809238; bh=kZeznpAsYtR/KuSY9FlKNNZy7FTGIqv7q4kHryxf5c8=; h=From:To:Cc:Subject:Date:From; b=BL9SReZ3+O0rfmKE1Xrd5Z79qRUFrDHZfhIHorfzsmYv1Gd6nJILvuvNW+Xe+Y5Qm WB5tbuOBwnYvt+qJZ6hGi6r5R94wf0htlAaMOcrdS3YxgRCK03QW7ey4dhrLQVlEVJ mCAc4zOyTn1Eev8OpZlbav3ici4BKNxEEo0PvHiMxQgfQJD7P8+bcgUpKzxki+GpWv regZR052Mz97+xv9xLcm/Jd8PX6thYncs7TkaG2jr8TdiThwXpLNC/eUpP8QYCGtfV 8Mne1fE5WboH5zHxC7TzHOX3uD2neWPDNr/SIw/rtwl91y4da+iU7QjMf55FMBy59C DuT0pGlqCyuFw== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: Ard Biesheuvel , Nicolas Pitre , Arnd Bergmann , Kees Cook , Keith Packard , Linus Walleij , Nick Desaulniers , Tony Lindgren , Marc Zyngier , Vladimir Murzin , Jesse Taube Subject: [PATCH v4 00/15] ARM: enable IRQ stacks and vmap'ed stacks for UP Date: Mon, 6 Dec 2021 17:46:44 +0100 Message-Id: <20211206164659.1495084-1-ardb@kernel.org> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6806; h=from:subject; bh=kZeznpAsYtR/KuSY9FlKNNZy7FTGIqv7q4kHryxf5c8=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBhrj5jK6Iy15wvZS8T9KC0cFBQtFX2rPVK2cGYzO60 FzD4k4WJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCYa4+YwAKCRDDTyI5ktmPJGNxC/ 4xBWlPtfr73UdNmyROoQyYEiaFS3eMcMFrAh+aQ6uqQ/588YBJQKmuyq++af0mLQAghrzgi+fKRymt iaErtEkvfMphdrjWgRnGNFGEIQnegaxHmbI8wJYPYaJi7kBi1G4Wg7LdeM7aOr7/zg2YpLpqnUBNFc RRYN2Qvse89YwfBdVcsmZwxwg1LWgKsW9EH1tj657enfePgz+z8qda4de95fpWgQS/+99cFPgCYler oP9zlNkCj38JpTXE6Ub28NpLBB8DsL4m005S9GGrCozQdXLwowIJR0K2j0sF8PQHMFoI3xHEY/zoMM FmLjpw1TjI1J+zzoskPY6h0tTBtQ4zxvoM541rx01zJWz9w/lngiYxqFSHwgvCQfnHPrLCAc6gqCsP DvjBn65tsCAEFWnWdoqjccMmx06YuVOxgBEqr65i0jA2oGc2Azu50B1UIp5xF6l15KaBH2/L6x16K2 ffG++1rD2vizONCTtKT29DKIqiYCf4jOyQIgr3pdBjyPw= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211206_084721_527886_D0BD9E2F X-CRM114-Status: GOOD ( 25.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org First, enable the use of the TLS register to hold the 'current' pointer for all configurations that can support it, including non-SMP ones that target v6k or later CPUs, and multi-platform SMP ones that also support v6 based UP systems. The remaining configurations are all strictly UP, which means we can switch to a global variable to hold the current pointer. By doing this, we can enable THREAD_INFO_IN_TASK, which moves thread info off the stack, protecting it from overflows. It also permits us to enable IRQ stacks and vmap'ed stacks for UP configurations as well. Supporting v6 cores without SMP extensions in SMP configurations (e.g., omap2plus_defconfig or imx_v6_v7_defconfig) makes this a bit tricky, and this is a feature we may consider dropping entirely in the future. But for the time being, we can support this mode as well. The accesses to the global variable holding 'current' are constructed in a way that ensures that no literal pool accesses (and associated D-cache misses) are needed unless the access is from a module and module PLTs are enabled. This means that accessing 'current' is just as costly as before, as it used to require some arithmetic involving the stack pointer and a load from the thread_info::task field. However, accessing thread_info itself now also involves a load, although it should be noted that all thread_info and current accesses now go via the same variable, which is therefore expected to be hot in the caches at all times. Changes since v3: - remove some dead code from the RiscPC interrupt handling routines before porting them to C, as suggested by Russell; - add clarifying comments to the module loader patch to explain where the group relocations are defined, and how to process them; - add some RBs and TBs Changes since v2: - support THREAD_INFO_IN_TASK and the IRQ stack on v7m as well, - incorporate a v7m cleanup from Vladimir to enable the above, - avoid declaring smp_on_up globally, - fix an oversight in the IOP32x IRQ #0 fix - add some more acks Changes since RFC/v1: - add five preparatory patches that move RiscPC, IOP32x and Footbridge to GENERIC_IRQ_MULTI_HANDLER so that even these ancient platforms can benefit from the IRQ stacks changes for UP that this series proposes (contributed by Arnd) - fix various issues related to SMP+v6 corner cases that were caught by kernelci testing; - add acks from Nico and Linus (thanks!) Cc: Russell King Cc: Nicolas Pitre Cc: Arnd Bergmann Cc: Kees Cook Cc: Keith Packard Cc: Linus Walleij Cc: Nick Desaulniers Cc: Tony Lindgren Cc: Marc Zyngier Cc: Vladimir Murzin Cc: Jesse Taube Ard Biesheuvel (9): ARM: riscpc: drop support for IOMD_IRQREQC/IOMD_IRQREQD IRQ groups ARM: entry: preserve thread_info pointer in switch_to ARM: module: implement support for PC-relative group relocations ARM: assembler: add optimized ldr/str macros to load variables from memory ARM: percpu: add SMP_ON_UP support ARM: use TLS register for 'current' on !SMP as well ARM: smp: defer TPIDRURO update for SMP v6 configurations too ARM: implement THREAD_INFO_IN_TASK for uniprocessor systems ARM: v7m: enable support for IRQ stacks Arnd Bergmann (5): ARM: riscpc: use GENERIC_IRQ_MULTI_HANDLER ARM: footbridge: use GENERIC_IRQ_MULTI_HANDLER ARM: iop32x: offset IRQ numbers by 1 ARM: iop32x: use GENERIC_IRQ_MULTI_HANDLER ARM: remove old-style irq entry Vladimir Murzin (1): irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER arch/arm/Kconfig | 22 +-- arch/arm/include/asm/assembler.h | 185 ++++++++++++++++---- arch/arm/include/asm/current.h | 37 ++-- arch/arm/include/asm/elf.h | 3 + arch/arm/include/asm/entry-macro-multi.S | 16 -- arch/arm/include/asm/hardware/entry-macro-iomd.S | 131 -------------- arch/arm/include/asm/insn.h | 24 +++ arch/arm/include/asm/irq.h | 1 - arch/arm/include/asm/mach/arch.h | 2 - arch/arm/include/asm/percpu.h | 25 ++- arch/arm/include/asm/switch_to.h | 3 +- arch/arm/include/asm/thread_info.h | 27 --- arch/arm/include/asm/tls.h | 13 +- arch/arm/include/asm/v7m.h | 3 +- arch/arm/kernel/asm-offsets.c | 3 - arch/arm/kernel/entry-armv.S | 48 ++--- arch/arm/kernel/entry-common.S | 16 +- arch/arm/kernel/entry-header.S | 13 +- arch/arm/kernel/entry-v7m.S | 39 +++-- arch/arm/kernel/head-common.S | 4 +- arch/arm/kernel/irq.c | 17 -- arch/arm/kernel/module.c | 85 +++++++++ arch/arm/kernel/process.c | 7 +- arch/arm/kernel/sleep.S | 4 +- arch/arm/kernel/smp.c | 11 ++ arch/arm/kernel/traps.c | 4 + arch/arm/mach-footbridge/common.c | 87 +++++++++ arch/arm/mach-footbridge/include/mach/entry-macro.S | 107 ----------- arch/arm/mach-iop32x/cp6.c | 10 +- arch/arm/mach-iop32x/include/mach/entry-macro.S | 31 ---- arch/arm/mach-iop32x/include/mach/irqs.h | 2 +- arch/arm/mach-iop32x/iop3xx.h | 1 + arch/arm/mach-iop32x/irq.c | 29 ++- arch/arm/mach-iop32x/irqs.h | 60 ++++--- arch/arm/mach-rpc/fiq.S | 5 +- arch/arm/mach-rpc/include/mach/entry-macro.S | 13 -- arch/arm/mach-rpc/irq.c | 95 ++++++++++ arch/arm/mm/Kconfig | 1 + drivers/irqchip/Kconfig | 1 + drivers/irqchip/irq-nvic.c | 22 +-- 40 files changed, 667 insertions(+), 540 deletions(-) delete mode 100644 arch/arm/include/asm/entry-macro-multi.S delete mode 100644 arch/arm/include/asm/hardware/entry-macro-iomd.S delete mode 100644 arch/arm/mach-footbridge/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-iop32x/include/mach/entry-macro.S delete mode 100644 arch/arm/mach-rpc/include/mach/entry-macro.S -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel