From: Michael Walle <michael@walle.cc>
To: Lars Povlsen <lars.povlsen@microchip.com>,
Steen Hegelund <Steen.Hegelund@microchip.com>,
Linus Walleij <linus.walleij@linaro.org>
Cc: UNGLinuxDriver@microchip.com,
linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org,
Colin Foster <colin.foster@in-advantage.com>,
Michael Walle <michael@walle.cc>
Subject: [PATCH v2 4/5] pinctrl: microchip-sgpio: return error in spgio_output_set()
Date: Sat, 26 Feb 2022 21:45:06 +0100 [thread overview]
Message-ID: <20220226204507.2511633-5-michael@walle.cc> (raw)
In-Reply-To: <20220226204507.2511633-1-michael@walle.cc>
Make sgpio_output_set() return an error value. Don't just ignore the
return value of any regmap access but propagate it to our callers. Even
if the accesses never fail, this is a preparation patch to add single
shot mode where we need to poll a bit and thus we might get -ETIMEDOUT.
Signed-off-by: Michael Walle <michael@walle.cc>
---
drivers/pinctrl/pinctrl-microchip-sgpio.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c
index a6ad61aa845e..a5085a215b8b 100644
--- a/drivers/pinctrl/pinctrl-microchip-sgpio.c
+++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c
@@ -225,9 +225,9 @@ static inline void sgpio_configure_clock(struct sgpio_priv *priv, u32 clkfrq)
sgpio_clrsetbits(priv, REG_SIO_CLOCK, 0, clr, set);
}
-static void sgpio_output_set(struct sgpio_priv *priv,
- struct sgpio_port_addr *addr,
- int value)
+static int sgpio_output_set(struct sgpio_priv *priv,
+ struct sgpio_port_addr *addr,
+ int value)
{
unsigned int bit = SGPIO_SRC_BITS * addr->bit;
u32 clr, set;
@@ -246,10 +246,12 @@ static void sgpio_output_set(struct sgpio_priv *priv,
set = FIELD_PREP(SGPIO_SPARX5_BIT_SOURCE, value << bit);
break;
default:
- return;
+ return -EINVAL;
}
sgpio_clrsetbits(priv, REG_PORT_CONFIG, addr->port, clr, set);
+
+ return 0;
}
static int sgpio_output_get(struct sgpio_priv *priv,
@@ -335,7 +337,7 @@ static int sgpio_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
case PIN_CONFIG_OUTPUT:
if (bank->is_input)
return -EINVAL;
- sgpio_output_set(priv, &addr, arg);
+ err = sgpio_output_set(priv, &addr, arg);
break;
default:
@@ -475,9 +477,7 @@ static int microchip_sgpio_direction_output(struct gpio_chip *gc,
sgpio_pin_to_addr(priv, gpio, &addr);
- sgpio_output_set(priv, &addr, value);
-
- return 0;
+ return sgpio_output_set(priv, &addr, value);
}
static int microchip_sgpio_get_direction(struct gpio_chip *gc, unsigned int gpio)
--
2.30.2
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next prev parent reply other threads:[~2022-02-26 20:47 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-26 20:45 [PATCH v2 0/5] pinctrl: microchip-sgpio: locking and synchronous output Michael Walle
2022-02-26 20:45 ` [PATCH v2 1/5] pinctrl: microchip-sgpio: lock RMW access Michael Walle
2022-02-26 20:45 ` [PATCH v2 2/5] pinctrl: microchip-sgpio: don't do RMW for interrupt ack register Michael Walle
2022-02-26 20:45 ` [PATCH v2 3/5] pinctrl: microchip-sgpio: use regmap_update_bits() Michael Walle
2022-02-26 20:45 ` Michael Walle [this message]
2022-02-26 20:45 ` [PATCH v2 5/5] pinctrl: microchip-sgpio: wait until output is actually set Michael Walle
2022-03-15 0:57 ` [PATCH v2 0/5] pinctrl: microchip-sgpio: locking and synchronous output Linus Walleij
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