From: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: <Project_Global_Chrome_Upstream_Group@mediatek.com>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
Chen-Yu Tsai <wenst@chromium.org>,
Ryder Lee <ryder.lee@kernel.org>,
"Hui Liu" <hui.liu@mediatek.com>,
Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Subject: [PATCH v3 07/21] arm64: dts: mt8192: Add audio-related nodes
Date: Fri, 4 Mar 2022 21:07:55 +0800 [thread overview]
Message-ID: <20220304130809.12924-8-allen-kh.cheng@mediatek.com> (raw)
In-Reply-To: <20220304130809.12924-1-allen-kh.cheng@mediatek.com>
Add audio-related nodes in audsys for mt8192 SoC.
- Move audsys node in ascending order.
- Increase the address range's length from 0x1000 to 0x2000.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 134 ++++++++++++++++++++++-
1 file changed, 128 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 6bc36a4076f4..40cf6dacca3e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -742,6 +742,134 @@
status = "disabled";
};
+ audsys: syscon@11210000 {
+ compatible = "mediatek,mt8192-audsys", "syscon";
+ reg = <0 0x11210000 0 0x2000>;
+ #clock-cells = <1>;
+ afe: mt8192-afe-pcm {
+ compatible = "mediatek,mt8192-audio";
+ interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 0>;
+ resets = <&watchdog 17>;
+ reset-names = "audiosys";
+ mediatek,apmixedsys = <&apmixedsys>;
+ mediatek,infracfg = <&infracfg>;
+ mediatek,topckgen = <&topckgen>;
+ power-domains = <&spm MT8192_POWER_DOMAIN_AUDIO>;
+ clocks = <&audsys CLK_AUD_AFE>,
+ <&audsys CLK_AUD_DAC>,
+ <&audsys CLK_AUD_DAC_PREDIS>,
+ <&audsys CLK_AUD_ADC>,
+ <&audsys CLK_AUD_ADDA6_ADC>,
+ <&audsys CLK_AUD_22M>,
+ <&audsys CLK_AUD_24M>,
+ <&audsys CLK_AUD_APLL_TUNER>,
+ <&audsys CLK_AUD_APLL2_TUNER>,
+ <&audsys CLK_AUD_TDM>,
+ <&audsys CLK_AUD_TML>,
+ <&audsys CLK_AUD_NLE>,
+ <&audsys CLK_AUD_DAC_HIRES>,
+ <&audsys CLK_AUD_ADC_HIRES>,
+ <&audsys CLK_AUD_ADC_HIRES_TML>,
+ <&audsys CLK_AUD_ADDA6_ADC_HIRES>,
+ <&audsys CLK_AUD_3RD_DAC>,
+ <&audsys CLK_AUD_3RD_DAC_PREDIS>,
+ <&audsys CLK_AUD_3RD_DAC_TML>,
+ <&audsys CLK_AUD_3RD_DAC_HIRES>,
+ <&infracfg CLK_INFRA_AUDIO>,
+ <&infracfg CLK_INFRA_AUDIO_26M_B>,
+ <&topckgen CLK_TOP_AUDIO_SEL>,
+ <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
+ <&topckgen CLK_TOP_MAINPLL_D4_D4>,
+ <&topckgen CLK_TOP_AUD_1_SEL>,
+ <&topckgen CLK_TOP_APLL1>,
+ <&topckgen CLK_TOP_AUD_2_SEL>,
+ <&topckgen CLK_TOP_APLL2>,
+ <&topckgen CLK_TOP_AUD_ENGEN1_SEL>,
+ <&topckgen CLK_TOP_APLL1_D4>,
+ <&topckgen CLK_TOP_AUD_ENGEN2_SEL>,
+ <&topckgen CLK_TOP_APLL2_D4>,
+ <&topckgen CLK_TOP_APLL_I2S0_M_SEL>,
+ <&topckgen CLK_TOP_APLL_I2S1_M_SEL>,
+ <&topckgen CLK_TOP_APLL_I2S2_M_SEL>,
+ <&topckgen CLK_TOP_APLL_I2S3_M_SEL>,
+ <&topckgen CLK_TOP_APLL_I2S4_M_SEL>,
+ <&topckgen CLK_TOP_APLL_I2S5_M_SEL>,
+ <&topckgen CLK_TOP_APLL_I2S6_M_SEL>,
+ <&topckgen CLK_TOP_APLL_I2S7_M_SEL>,
+ <&topckgen CLK_TOP_APLL_I2S8_M_SEL>,
+ <&topckgen CLK_TOP_APLL_I2S9_M_SEL>,
+ <&topckgen CLK_TOP_APLL12_DIV0>,
+ <&topckgen CLK_TOP_APLL12_DIV1>,
+ <&topckgen CLK_TOP_APLL12_DIV2>,
+ <&topckgen CLK_TOP_APLL12_DIV3>,
+ <&topckgen CLK_TOP_APLL12_DIV4>,
+ <&topckgen CLK_TOP_APLL12_DIVB>,
+ <&topckgen CLK_TOP_APLL12_DIV5>,
+ <&topckgen CLK_TOP_APLL12_DIV6>,
+ <&topckgen CLK_TOP_APLL12_DIV7>,
+ <&topckgen CLK_TOP_APLL12_DIV8>,
+ <&topckgen CLK_TOP_APLL12_DIV9>,
+ <&topckgen CLK_TOP_AUDIO_H_SEL>,
+ <&clk26m>;
+ clock-names = "aud_afe_clk",
+ "aud_dac_clk",
+ "aud_dac_predis_clk",
+ "aud_adc_clk",
+ "aud_adda6_adc_clk",
+ "aud_apll22m_clk",
+ "aud_apll24m_clk",
+ "aud_apll1_tuner_clk",
+ "aud_apll2_tuner_clk",
+ "aud_tdm_clk",
+ "aud_tml_clk",
+ "aud_nle",
+ "aud_dac_hires_clk",
+ "aud_adc_hires_clk",
+ "aud_adc_hires_tml",
+ "aud_adda6_adc_hires_clk",
+ "aud_3rd_dac_clk",
+ "aud_3rd_dac_predis_clk",
+ "aud_3rd_dac_tml",
+ "aud_3rd_dac_hires_clk",
+ "aud_infra_clk",
+ "aud_infra_26m_clk",
+ "top_mux_audio",
+ "top_mux_audio_int",
+ "top_mainpll_d4_d4",
+ "top_mux_aud_1",
+ "top_apll1_ck",
+ "top_mux_aud_2",
+ "top_apll2_ck",
+ "top_mux_aud_eng1",
+ "top_apll1_d4",
+ "top_mux_aud_eng2",
+ "top_apll2_d4",
+ "top_i2s0_m_sel",
+ "top_i2s1_m_sel",
+ "top_i2s2_m_sel",
+ "top_i2s3_m_sel",
+ "top_i2s4_m_sel",
+ "top_i2s5_m_sel",
+ "top_i2s6_m_sel",
+ "top_i2s7_m_sel",
+ "top_i2s8_m_sel",
+ "top_i2s9_m_sel",
+ "top_apll12_div0",
+ "top_apll12_div1",
+ "top_apll12_div2",
+ "top_apll12_div3",
+ "top_apll12_div4",
+ "top_apll12_divb",
+ "top_apll12_div5",
+ "top_apll12_div6",
+ "top_apll12_div7",
+ "top_apll12_div8",
+ "top_apll12_div9",
+ "top_mux_audio_h",
+ "top_clk26m_clk";
+ };
+ };
+
nor_flash: spi@11234000 {
compatible = "mediatek,mt8192-nor";
reg = <0 0x11234000 0 0xe0>;
@@ -757,12 +885,6 @@
status = "disable";
};
- audsys: clock-controller@11210000 {
- compatible = "mediatek,mt8192-audsys", "syscon";
- reg = <0 0x11210000 0 0x1000>;
- #clock-cells = <1>;
- };
-
i2c3: i2c@11cb0000 {
compatible = "mediatek,mt8192-i2c";
reg = <0 0x11cb0000 0 0x1000>,
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-03-04 13:10 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-04 13:07 [PATCH v3 00/21] Add driver nodes for MT8192 SoC Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 01/21] arm64: dts: mt8192: Add pwrap node Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 02/21] arm64: dts: mt8192: Add spmi node Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 03/21] arm64: dts: mt8192: Add gce node Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 04/21] arm64: dts: mt8192: Add SCP node Allen-KH Cheng
2022-03-15 14:34 ` AngeloGioacchino Del Regno
2022-03-04 13:07 ` [PATCH v3 05/21] arm64: dts: mt8192: Add usb-phy node Allen-KH Cheng
2022-03-15 14:34 ` AngeloGioacchino Del Regno
2022-03-04 13:07 ` [PATCH v3 06/21] arm64: dts: mt8192: Add xhci node Allen-KH Cheng
2022-03-04 13:07 ` Allen-KH Cheng [this message]
2022-03-04 13:07 ` [PATCH v3 08/21] arm64: dts: mt8192: Add infracfg_rst node Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 09/21] arm64: dts: mt8192: Add PCIe node Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 10/21] arm64: dts: mt8192: Fix nor_flash status disable typo Allen-KH Cheng
2022-03-04 13:07 ` [PATCH v3 11/21] arm64: dts: mt8192: Add efuse node Allen-KH Cheng
2022-03-15 14:34 ` AngeloGioacchino Del Regno
2022-03-04 13:08 ` [PATCH v3 12/21] arm64: dts: mt8192: Add mmc device nodes Allen-KH Cheng
2022-03-15 14:47 ` AngeloGioacchino Del Regno
2022-03-18 12:19 ` allen-kh.cheng
2022-03-04 13:08 ` [PATCH v3 13/21] arm64: dts: mt8192: Add mipi_tx node Allen-KH Cheng
2022-03-15 14:35 ` AngeloGioacchino Del Regno
2022-03-04 13:08 ` [PATCH v3 14/21] arm64: dts: mt8192: Add m4u and smi nodes Allen-KH Cheng
2022-03-04 13:08 ` [PATCH v3 15/21] arm64: dts: mt8192: Add H264 venc device node Allen-KH Cheng
2022-03-04 13:08 ` [PATCH v3 16/21] arm64: dts: mt8192: Add vcodec lat and core nodes Allen-KH Cheng
2022-03-15 14:39 ` AngeloGioacchino Del Regno
2022-03-18 12:22 ` allen-kh.cheng
2022-03-04 13:08 ` [PATCH v3 17/21] arm64: dts: mt8192: Add dpi node Allen-KH Cheng
2022-03-15 14:41 ` AngeloGioacchino Del Regno
2022-03-04 13:08 ` [PATCH v3 18/21] arm64: dts: mt8192: Add display nodes Allen-KH Cheng
2022-03-04 13:08 ` [PATCH v3 19/21] arm64: dts: mt8192: Add dsi node Allen-KH Cheng
2022-03-15 14:51 ` AngeloGioacchino Del Regno
2022-03-18 12:15 ` allen-kh.cheng
2022-03-04 13:08 ` [PATCH v3 20/21] arm64: dts: mt8192: Add gce info for display nodes Allen-KH Cheng
2022-03-15 14:54 ` AngeloGioacchino Del Regno
2022-03-04 13:08 ` [PATCH v3 21/21] arm64: dts: mt8192: Add pwm node Allen-KH Cheng
2022-03-15 14:54 ` AngeloGioacchino Del Regno
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220304130809.12924-8-allen-kh.cheng@mediatek.com \
--to=allen-kh.cheng@mediatek.com \
--cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=hui.liu@mediatek.com \
--cc=krzysztof.kozlowski@canonical.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=matthias.bgg@gmail.com \
--cc=robh+dt@kernel.org \
--cc=ryder.lee@kernel.org \
--cc=wenst@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).