From: Nancy.Lin <nancy.lin@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chun-Kuang Hu <chunkuang.hu@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
<wim@linux-watchdog.org>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
"Nathan Chancellor" <nathan@kernel.org>,
Nick Desaulniers <ndesaulniers@google.com>,
"Nancy . Lin" <nancy.lin@mediatek.com>,
"jason-jh . lin" <jason-jh.lin@mediatek.com>,
Yongqiang Niu <yongqiang.niu@mediatek.com>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<dri-devel@lists.freedesktop.org>, <llvm@lists.linux.dev>,
<singo.chang@mediatek.com>, <srv_heupstream@mediatek.com>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [RESEND v13 11/22] drm/mediatek: add display merge advance config API for MT8195
Date: Tue, 8 Mar 2022 17:30:07 +0800 [thread overview]
Message-ID: <20220308093018.24189-12-nancy.lin@mediatek.com> (raw)
In-Reply-To: <20220308093018.24189-1-nancy.lin@mediatek.com>
Add merge new advance config API. The original merge API is
mtk_ddp_comp_funcs function prototype. The API interface parameters
cannot be modified, so add a new config API for extension. This is
the preparation for ovl_adaptor merge control.
Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 ++
drivers/gpu/drm/mediatek/mtk_disp_merge.c | 52 ++++++++++++++++++++---
2 files changed, 48 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
index b3a372cab0bd..c2de53a5892e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
@@ -63,6 +63,9 @@ void mtk_merge_config(struct device *dev, unsigned int width,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
void mtk_merge_start(struct device *dev);
void mtk_merge_stop(struct device *dev);
+void mtk_merge_advance_config(struct device *dev, unsigned int l_w, unsigned int r_w,
+ unsigned int h, unsigned int vrefresh, unsigned int bpc,
+ struct cmdq_pkt *cmdq_pkt);
void mtk_ovl_bgclr_in_on(struct device *dev);
void mtk_ovl_bgclr_in_off(struct device *dev);
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c b/drivers/gpu/drm/mediatek/mtk_disp_merge.c
index 45face638153..40da0555416d 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c
@@ -17,6 +17,7 @@
#define DISP_REG_MERGE_CTRL 0x000
#define MERGE_EN 1
#define DISP_REG_MERGE_CFG_0 0x010
+#define DISP_REG_MERGE_CFG_1 0x014
#define DISP_REG_MERGE_CFG_4 0x020
#define DISP_REG_MERGE_CFG_10 0x038
/* no swap */
@@ -25,9 +26,12 @@
#define DISP_REG_MERGE_CFG_12 0x040
#define CFG_10_10_1PI_2PO_BUF_MODE 6
#define CFG_10_10_2PI_2PO_BUF_MODE 8
+#define CFG_11_10_1PI_2PO_MERGE 18
#define FLD_CFG_MERGE_MODE GENMASK(4, 0)
#define DISP_REG_MERGE_CFG_24 0x070
#define DISP_REG_MERGE_CFG_25 0x074
+#define DISP_REG_MERGE_CFG_26 0x078
+#define DISP_REG_MERGE_CFG_27 0x07c
#define DISP_REG_MERGE_CFG_36 0x0a0
#define ULTRA_EN BIT(0)
#define PREULTRA_EN BIT(4)
@@ -98,12 +102,19 @@ static void mtk_merge_fifo_setting(struct mtk_disp_merge *priv,
void mtk_merge_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
+{
+ mtk_merge_advance_config(dev, w, 0, h, vrefresh, bpc, cmdq_pkt);
+}
+
+void mtk_merge_advance_config(struct device *dev, unsigned int l_w, unsigned int r_w,
+ unsigned int h, unsigned int vrefresh, unsigned int bpc,
+ struct cmdq_pkt *cmdq_pkt)
{
struct mtk_disp_merge *priv = dev_get_drvdata(dev);
unsigned int mode = CFG_10_10_1PI_2PO_BUF_MODE;
- if (!h || !w) {
- dev_err(dev, "%s: input width(%d) or height(%d) is invalid\n", __func__, w, h);
+ if (!h || !l_w) {
+ dev_err(dev, "%s: input width(%d) or height(%d) is invalid\n", __func__, l_w, h);
return;
}
@@ -112,14 +123,41 @@ void mtk_merge_config(struct device *dev, unsigned int w,
mode = CFG_10_10_2PI_2PO_BUF_MODE;
}
- mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs,
+ if (r_w)
+ mode = CFG_11_10_1PI_2PO_MERGE;
+
+ mtk_ddp_write(cmdq_pkt, h << 16 | l_w, &priv->cmdq_reg, priv->regs,
DISP_REG_MERGE_CFG_0);
- mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs,
+ mtk_ddp_write(cmdq_pkt, h << 16 | r_w, &priv->cmdq_reg, priv->regs,
+ DISP_REG_MERGE_CFG_1);
+ mtk_ddp_write(cmdq_pkt, h << 16 | (l_w + r_w), &priv->cmdq_reg, priv->regs,
DISP_REG_MERGE_CFG_4);
- mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs,
+ /*
+ * DISP_REG_MERGE_CFG_24 is merge SRAM0 w/h
+ * DISP_REG_MERGE_CFG_25 is merge SRAM1 w/h.
+ * If r_w > 0, the merge is in merge mode (input0 and input1 merge together),
+ * the input0 goes to SRAM0, and input1 goes to SRAM1.
+ * If r_w = 0, the merge is in buffer mode, the input goes through SRAM0 and
+ * then to SRAM1. Both SRAM0 and SRAM1 are set to the same size.
+ */
+ mtk_ddp_write(cmdq_pkt, h << 16 | l_w, &priv->cmdq_reg, priv->regs,
DISP_REG_MERGE_CFG_24);
- mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs,
- DISP_REG_MERGE_CFG_25);
+ if (r_w)
+ mtk_ddp_write(cmdq_pkt, h << 16 | r_w, &priv->cmdq_reg, priv->regs,
+ DISP_REG_MERGE_CFG_25);
+ else
+ mtk_ddp_write(cmdq_pkt, h << 16 | l_w, &priv->cmdq_reg, priv->regs,
+ DISP_REG_MERGE_CFG_25);
+
+ /*
+ * DISP_REG_MERGE_CFG_26 and DISP_REG_MERGE_CFG_27 is only used in LR merge.
+ * Only take effect when the merge is setting to merge mode.
+ */
+ mtk_ddp_write(cmdq_pkt, h << 16 | l_w, &priv->cmdq_reg, priv->regs,
+ DISP_REG_MERGE_CFG_26);
+ mtk_ddp_write(cmdq_pkt, h << 16 | r_w, &priv->cmdq_reg, priv->regs,
+ DISP_REG_MERGE_CFG_27);
+
mtk_ddp_write_mask(cmdq_pkt, SWAP_MODE, &priv->cmdq_reg, priv->regs,
DISP_REG_MERGE_CFG_10, FLD_SWAP_MODE);
mtk_ddp_write_mask(cmdq_pkt, mode, &priv->cmdq_reg, priv->regs,
--
2.18.0
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-03-08 9:43 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-08 9:29 [RESEND v13 00/22] Add MediaTek SoC DRM (vdosys1) support for mt8195 Nancy.Lin
2022-03-08 9:29 ` [RESEND v13 01/22] dt-bindings: mediatek: add vdosys1 RDMA definition " Nancy.Lin
2022-03-08 13:43 ` AngeloGioacchino Del Regno
2022-03-08 9:29 ` [RESEND v13 02/22] dt-bindings: reset: mt8195: add vdosys1 reset control bit Nancy.Lin
2022-03-08 9:29 ` [RESEND v13 03/22] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 04/22] soc: mediatek: add mtk-mmsys config API " Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 05/22] soc: mediatek: add cmdq support of " Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 06/22] soc: mediatek: mmsys: modify reset controller for MT8195 vdosys1 Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 07/22] soc: mediatek: mmsys: specify 64BIT dependency for MTK_MMSYS Nancy.Lin
2022-03-08 13:41 ` AngeloGioacchino Del Regno
2022-03-10 2:41 ` Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 08/22] soc: mediatek: change the mutex defines and the mutex_mod type Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 09/22] soc: mediatek: add mtk-mutex support for mt8195 vdosys1 Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 10/22] drm/mediatek: add display MDP RDMA support for MT8195 Nancy.Lin
2022-03-08 9:30 ` Nancy.Lin [this message]
2022-03-08 9:30 ` [RESEND v13 12/22] drm/mediatek: add display merge start/stop API for cmdq support Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 13/22] drm/mediatek: add display merge mute/unmute support for MT8195 Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 14/22] drm/mediatek: add display merge async reset control Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 15/22] drm/mediatek: add ETHDR support for MT8195 Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 16/22] drm/mediatek: add mediatek-drm plane color encoding info Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 17/22] drm/mediatek: add ovl_adaptor support for MT8195 Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 18/22] drm/mediatek: add dma dev get function Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 19/22] drm/mediatek: modify mediatek-drm for mt8195 multi mmsys support Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 20/22] drm/mediatek: add drm ovl_adaptor sub driver for MT8195 Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 21/22] drm/mediatek: add mediatek-drm of vdosys1 support " Nancy.Lin
2022-03-08 9:30 ` [RESEND v13 22/22] arm64: dts: mt8195: add display node for vdosys1 Nancy.Lin
2022-03-08 13:43 ` AngeloGioacchino Del Regno
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