From: Marc Zyngier <maz@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Thierry Reding <thierry.reding@gmail.com>,
Joey Gouly <joey.gouly@arm.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Hector Martin <marcan@marcan.st>, Sven Peter <sven@svenpeter.dev>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Andy Gross <agross@kernel.org>,
Jeffrey Hugo <jeffrey.l.hugo@gmail.com>,
Thomas Gleixner <tglx@linutronix.de>,
Basavaraj Natikar <Basavaraj.Natikar@amd.com>,
Shyam Sundar S K <Shyam-sundar.S-k@amd.com>,
Andy Shevchenko <andy.shevchenko@gmail.com>,
linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, kernel-team@android.com
Subject: [PATCH v3 07/10] pinctrl: msmgpio: Make the irqchip immutable
Date: Tue, 19 Apr 2022 15:18:43 +0100 [thread overview]
Message-ID: <20220419141846.598305-8-maz@kernel.org> (raw)
In-Reply-To: <20220419141846.598305-1-maz@kernel.org>
Prevent gpiolib from messing with the irqchip by advertising
the irq_chip structure as immutable, making it const, and adding
the various calls that gpiolib relies upon.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
drivers/pinctrl/qcom/pinctrl-msm.c | 53 +++++++++++++++++++-----------
1 file changed, 33 insertions(+), 20 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index 966ea6622ff3..a2abfe987ab1 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -42,7 +42,6 @@
* @chip: gpiochip handle.
* @desc: pin controller descriptor
* @restart_nb: restart notifier block.
- * @irq_chip: irq chip information
* @irq: parent irq for the TLMM irq_chip.
* @intr_target_use_scm: route irq to application cpu using scm calls
* @lock: Spinlock to protect register resources as well
@@ -63,7 +62,6 @@ struct msm_pinctrl {
struct pinctrl_desc desc;
struct notifier_block restart_nb;
- struct irq_chip irq_chip;
int irq;
bool intr_target_use_scm;
@@ -868,6 +866,8 @@ static void msm_gpio_irq_enable(struct irq_data *d)
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct msm_pinctrl *pctrl = gpiochip_get_data(gc);
+ gpiochip_enable_irq(gc, d->hwirq);
+
if (d->parent_data)
irq_chip_enable_parent(d);
@@ -885,6 +885,8 @@ static void msm_gpio_irq_disable(struct irq_data *d)
if (!test_bit(d->hwirq, pctrl->skip_wake_irqs))
msm_gpio_irq_mask(d);
+
+ gpiochip_disable_irq(gc, d->hwirq);
}
/**
@@ -958,6 +960,14 @@ static void msm_gpio_irq_ack(struct irq_data *d)
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
}
+static void msm_gpio_irq_eoi(struct irq_data *d)
+{
+ d = d->parent_data;
+
+ if (d)
+ d->chip->irq_eoi(d);
+}
+
static bool msm_gpio_needs_dual_edge_parent_workaround(struct irq_data *d,
unsigned int type)
{
@@ -1255,6 +1265,26 @@ static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl)
return device_property_count_u16(pctrl->dev, "gpios") > 0;
}
+static const struct irq_chip msm_gpio_irq_chip = {
+ .name = "msmgpio",
+ .irq_enable = msm_gpio_irq_enable,
+ .irq_disable = msm_gpio_irq_disable,
+ .irq_mask = msm_gpio_irq_mask,
+ .irq_unmask = msm_gpio_irq_unmask,
+ .irq_ack = msm_gpio_irq_ack,
+ .irq_eoi = msm_gpio_irq_eoi,
+ .irq_set_type = msm_gpio_irq_set_type,
+ .irq_set_wake = msm_gpio_irq_set_wake,
+ .irq_request_resources = msm_gpio_irq_reqres,
+ .irq_release_resources = msm_gpio_irq_relres,
+ .irq_set_affinity = msm_gpio_irq_set_affinity,
+ .irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity,
+ .flags = (IRQCHIP_MASK_ON_SUSPEND |
+ IRQCHIP_SET_TYPE_MASKED |
+ IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND |
+ IRQCHIP_IMMUTABLE),
+};
+
static int msm_gpio_init(struct msm_pinctrl *pctrl)
{
struct gpio_chip *chip;
@@ -1276,22 +1306,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
if (msm_gpio_needs_valid_mask(pctrl))
chip->init_valid_mask = msm_gpio_init_valid_mask;
- pctrl->irq_chip.name = "msmgpio";
- pctrl->irq_chip.irq_enable = msm_gpio_irq_enable;
- pctrl->irq_chip.irq_disable = msm_gpio_irq_disable;
- pctrl->irq_chip.irq_mask = msm_gpio_irq_mask;
- pctrl->irq_chip.irq_unmask = msm_gpio_irq_unmask;
- pctrl->irq_chip.irq_ack = msm_gpio_irq_ack;
- pctrl->irq_chip.irq_set_type = msm_gpio_irq_set_type;
- pctrl->irq_chip.irq_set_wake = msm_gpio_irq_set_wake;
- pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres;
- pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres;
- pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity;
- pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity;
- pctrl->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND |
- IRQCHIP_SET_TYPE_MASKED |
- IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND;
-
np = of_parse_phandle(pctrl->dev->of_node, "wakeup-parent", 0);
if (np) {
chip->irq.parent_domain = irq_find_matching_host(np,
@@ -1300,7 +1314,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
if (!chip->irq.parent_domain)
return -EPROBE_DEFER;
chip->irq.child_to_parent_hwirq = msm_gpio_wakeirq;
- pctrl->irq_chip.irq_eoi = irq_chip_eoi_parent;
/*
* Let's skip handling the GPIOs, if the parent irqchip
* is handling the direct connect IRQ of the GPIO.
@@ -1313,7 +1326,7 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
}
girq = &chip->irq;
- girq->chip = &pctrl->irq_chip;
+ gpio_irq_chip_set_chip(girq, &msm_gpio_irq_chip);
girq->parent_handler = msm_gpio_irq_handler;
girq->fwnode = pctrl->dev->fwnode;
girq->num_parents = 1;
--
2.34.1
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next prev parent reply other threads:[~2022-04-19 15:07 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-19 14:18 [PATCH v3 00/10] gpiolib: Handle immutable irq_chip structures Marc Zyngier
2022-04-19 14:18 ` [PATCH v3 01/10] gpio: Don't fiddle with irqchips marked as immutable Marc Zyngier
2022-04-19 14:18 ` [PATCH v3 02/10] gpio: Expose the gpiochip_irq_re[ql]res helpers Marc Zyngier
2022-04-19 14:18 ` [PATCH v3 03/10] gpio: Add helpers to ease the transition towards immutable irq_chip Marc Zyngier
2022-04-19 14:18 ` [PATCH v3 04/10] gpio: tegra186: Make the irqchip immutable Marc Zyngier
2022-04-19 14:18 ` [PATCH v3 05/10] gpio: pl061: " Marc Zyngier
2022-04-19 14:18 ` [PATCH v3 06/10] pinctrl: apple-gpio: " Marc Zyngier
2022-04-19 14:18 ` Marc Zyngier [this message]
2022-04-19 14:18 ` [PATCH v3 08/10] pinctrl: amd: " Marc Zyngier
2022-04-19 14:18 ` [PATCH v3 09/10] gpio: Update TODO to mention immutable irq_chip structures Marc Zyngier
2022-04-19 14:18 ` [PATCH v3 10/10] Documentation: Update the recommended pattern for GPIO irqchips Marc Zyngier
2022-04-22 21:24 ` [PATCH v3 00/10] gpiolib: Handle immutable irq_chip structures Linus Walleij
2022-04-23 10:30 ` Marc Zyngier
2022-04-26 10:24 ` Andy Shevchenko
2022-04-26 21:59 ` Linus Walleij
2022-05-04 21:21 ` Linus Walleij
2022-05-05 8:09 ` Marc Zyngier
2022-05-05 12:58 ` Bartosz Golaszewski
2022-05-05 14:50 ` Linus Walleij
2022-05-12 17:08 ` Andy Shevchenko
2022-05-12 17:35 ` Andy Shevchenko
2022-05-12 22:18 ` Marc Zyngier
2022-05-13 8:43 ` Andy Shevchenko
2022-05-13 8:51 ` Marc Zyngier
2022-05-12 22:15 ` Marc Zyngier
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