From: Will Deacon <will@kernel.org>
To: Rob Clark <robdclark@gmail.com>
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>,
~postmarketos/upstreaming@lists.sr.ht,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
"list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>,
Joerg Roedel <joro@8bytes.org>,"
<iommu@lists.linux-foundation.org>,
Martin Botka <martin.botka@somainline.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@somainline.org>,
Marijn Suijten <marijn.suijten@somainline.org>,
jamipkettunen@somainline.org, Andy Gross <agross@kernel.org>,
Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Robin Murphy <robin.murphy@arm.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/6] iommu/qcom: Use the asid read from device-tree if specified
Date: Tue, 31 May 2022 17:19:11 +0100 [thread overview]
Message-ID: <20220531161910.GE25502@willie-the-truck> (raw)
In-Reply-To: <CAF6AEGsWsHfQZnszG=NgP0BufxO-DP4LwvsAYkrz2wRhcJuOXw@mail.gmail.com>
On Tue, May 31, 2022 at 09:15:22AM -0700, Rob Clark wrote:
> On Tue, May 31, 2022 at 8:46 AM Will Deacon <will@kernel.org> wrote:
> >
> > On Fri, May 27, 2022 at 11:28:56PM +0200, Konrad Dybcio wrote:
> > > From: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> > >
> > > As specified in this driver, the context banks are 0x1000 apart.
> > > Problem is that sometimes the context number (our asid) does not
> > > match this logic and we end up using the wrong one: this starts
> > > being a problem in the case that we need to send TZ commands
> > > to do anything on a specific context.
> >
> > I don't understand this. The ASID is a software construct, so it shouldn't
> > matter what we use. If it does matter, then please can you explain why? The
> > fact that the context banks are 0x1000 apart seems unrelated.
>
> I think the connection is that mapping from ctx bank to ASID is 1:1
But in what sense? How is the ASID used beyond a tag in the TLB? The commit
message hints at "TZ commands" being a problem.
I'm not doubting that this is needed to make the thing work, I just don't
understand why.
Will
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next prev parent reply other threads:[~2022-05-31 16:20 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-27 21:28 [PATCH 0/6] Fix and extend Qualcomm IOMMU support Konrad Dybcio
2022-05-27 21:28 ` [PATCH 1/6] iommu/qcom: Use the asid read from device-tree if specified Konrad Dybcio
2022-05-31 15:46 ` Will Deacon
2022-05-31 16:15 ` Rob Clark
2022-05-31 16:19 ` Will Deacon [this message]
2022-05-31 20:57 ` Rob Clark
2022-06-03 18:03 ` Konrad Dybcio
2022-06-08 10:25 ` AngeloGioacchino Del Regno
2022-05-27 21:28 ` [PATCH 2/6] iommu/qcom: Write TCR before TTBRs to fix ASID access behavior Konrad Dybcio
2022-05-31 15:55 ` Will Deacon
2022-05-31 16:26 ` Robin Murphy
2022-06-05 22:06 ` Marijn Suijten
2022-06-08 10:27 ` AngeloGioacchino Del Regno
2022-06-08 10:54 ` Robin Murphy
2022-06-08 11:03 ` AngeloGioacchino Del Regno
2022-05-27 21:28 ` [PATCH 3/6] iommu/qcom: Properly reset the IOMMU context Konrad Dybcio
2022-05-27 21:28 ` [PATCH 4/6] iommu/qcom: Add support for AArch64 IOMMU pagetables Konrad Dybcio
2022-05-28 2:03 ` kernel test robot
2022-06-02 14:17 ` Rob Herring
2022-05-27 21:29 ` [PATCH 5/6] iommu/qcom: Index contexts by asid number to allow asid 0 Konrad Dybcio
2022-06-03 15:14 ` Brian Masney
2022-05-27 21:29 ` [PATCH 6/6] iommu/qcom: Add support for QCIOMMUv2 and QCIOMMU-500 secured contexts Konrad Dybcio
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