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From: Tinghan Shen <tinghan.shen@mediatek.com>
To: Yong Wu <yong.wu@mediatek.com>, Joerg Roedel <joro@8bytes.org>,
	Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Lee Jones <lee@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Tinghan Shen <tinghan.shen@mediatek.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	MandyJH Liu <mandyjh.liu@mediatek.com>
Cc: <iommu@lists.linux.dev>, <linux-mediatek@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v4 03/20] dt-bindings: power: mediatek: Refine multiple level power domain nodes
Date: Fri, 29 Jul 2022 14:31:51 +0800	[thread overview]
Message-ID: <20220729063208.16799-4-tinghan.shen@mediatek.com> (raw)
In-Reply-To: <20220729063208.16799-1-tinghan.shen@mediatek.com>

Extract duplicated properties and support more levels of power
domain nodes.

This change fix following error when do dtbs_check,
    arch/arm64/boot/dts/mediatek/mt8195-evb.dtb: power-controller: power-domain@15:power-domain@16:power-domain@18: 'power-domain@19', 'power-domain@20', 'power-domain@21' do not match any of the regexes: 'pinctrl-[0-9]+'
	 From schema: Documentation/devicetree/bindings/power/mediatek,power-controller.yaml

Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../power/mediatek,power-controller.yaml      | 131 +++---------------
 1 file changed, 17 insertions(+), 114 deletions(-)

diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
index b448101fac43e..321802c95308f 100644
--- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
@@ -42,6 +42,23 @@ properties:
 
 patternProperties:
   "^power-domain@[0-9a-f]+$":
+    $ref: "#/$defs/power-domain-node"
+    patternProperties:
+      "^power-domain@[0-9a-f]+$":
+        $ref: "#/$defs/power-domain-node"
+        patternProperties:
+          "^power-domain@[0-9a-f]+$":
+            $ref: "#/$defs/power-domain-node"
+            patternProperties:
+              "^power-domain@[0-9a-f]+$":
+                $ref: "#/$defs/power-domain-node"
+                unevaluatedProperties: false
+            unevaluatedProperties: false
+        unevaluatedProperties: false
+    unevaluatedProperties: false
+
+$defs:
+  power-domain-node:
     type: object
     description: |
       Represents the power domains within the power controller node as documented
@@ -100,123 +117,9 @@ patternProperties:
         $ref: /schemas/types.yaml#/definitions/phandle
         description: phandle to the device containing the SMI register range.
 
-    patternProperties:
-      "^power-domain@[0-9a-f]+$":
-        type: object
-        description: |
-          Represents a power domain child within a power domain parent node.
-
-        properties:
-
-          '#power-domain-cells':
-            description:
-              Must be 0 for nodes representing a single PM domain and 1 for nodes
-              providing multiple PM domains.
-
-          '#address-cells':
-            const: 1
-
-          '#size-cells':
-            const: 0
-
-          reg:
-            maxItems: 1
-
-          clocks:
-            description: |
-              A number of phandles to clocks that need to be enabled during domain
-              power-up sequencing.
-
-          clock-names:
-            description: |
-              List of names of clocks, in order to match the power-up sequencing
-              for each power domain we need to group the clocks by name. BASIC
-              clocks need to be enabled before enabling the corresponding power
-              domain, and should not have a '-' in their name (i.e mm, mfg, venc).
-              SUSBYS clocks need to be enabled before releasing the bus protection,
-              and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).
-
-              In order to follow properly the power-up sequencing, the clocks must
-              be specified by order, adding first the BASIC clocks followed by the
-              SUSBSYS clocks.
-
-          domain-supply:
-            description: domain regulator supply.
-
-          mediatek,infracfg:
-            $ref: /schemas/types.yaml#/definitions/phandle
-            description: phandle to the device containing the INFRACFG register range.
-
-          mediatek,smi:
-            $ref: /schemas/types.yaml#/definitions/phandle
-            description: phandle to the device containing the SMI register range.
-
-        patternProperties:
-          "^power-domain@[0-9a-f]+$":
-            type: object
-            description: |
-              Represents a power domain child within a power domain parent node.
-
-            properties:
-
-              '#power-domain-cells':
-                description:
-                  Must be 0 for nodes representing a single PM domain and 1 for nodes
-                  providing multiple PM domains.
-
-              '#address-cells':
-                const: 1
-
-              '#size-cells':
-                const: 0
-
-              reg:
-                maxItems: 1
-
-              clocks:
-                description: |
-                  A number of phandles to clocks that need to be enabled during domain
-                  power-up sequencing.
-
-              clock-names:
-                description: |
-                  List of names of clocks, in order to match the power-up sequencing
-                  for each power domain we need to group the clocks by name. BASIC
-                  clocks need to be enabled before enabling the corresponding power
-                  domain, and should not have a '-' in their name (i.e mm, mfg, venc).
-                  SUSBYS clocks need to be enabled before releasing the bus protection,
-                  and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).
-
-                  In order to follow properly the power-up sequencing, the clocks must
-                  be specified by order, adding first the BASIC clocks followed by the
-                  SUSBSYS clocks.
-
-              domain-supply:
-                description: domain regulator supply.
-
-              mediatek,infracfg:
-                $ref: /schemas/types.yaml#/definitions/phandle
-                description: phandle to the device containing the INFRACFG register range.
-
-              mediatek,smi:
-                $ref: /schemas/types.yaml#/definitions/phandle
-                description: phandle to the device containing the SMI register range.
-
-            required:
-              - reg
-
-            additionalProperties: false
-
-        required:
-          - reg
-
-        additionalProperties: false
-
     required:
       - reg
 
-    additionalProperties: false
-
 required:
   - compatible
 
-- 
2.18.0


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  parent reply	other threads:[~2022-07-29  6:57 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-29  6:31 [PATCH v4 00/20] Add driver nodes for MT8195 SoC Tinghan Shen
2022-07-29  6:31 ` [PATCH v4 01/20] dt-bindings: iommu: mediatek: Increase max interrupt number Tinghan Shen
2022-07-29  8:06   ` AngeloGioacchino Del Regno
2022-08-01 12:04   ` Yong Wu
2022-08-04  2:06     ` Tinghan Shen
2022-07-29  6:31 ` [PATCH v4 02/20] dt-bindings: memory: mediatek: Update condition for mt8195 smi node Tinghan Shen
2022-08-16  9:21   ` (subset) " Krzysztof Kozlowski
2022-07-29  6:31 ` Tinghan Shen [this message]
2022-07-29  8:06   ` [PATCH v4 03/20] dt-bindings: power: mediatek: Refine multiple level power domain nodes AngeloGioacchino Del Regno
2022-08-25 13:34     ` Matthias Brugger
2022-07-29  6:31 ` [PATCH v4 04/20] dt-bindings: power: mediatek: Support naming power controller node with unit address Tinghan Shen
2022-07-29  8:06   ` AngeloGioacchino Del Regno
2022-08-25 13:35   ` Matthias Brugger
2022-07-29  6:31 ` [PATCH v4 05/20] dt-bindings: power: mediatek: Update maintainer list Tinghan Shen
2022-08-04  8:43   ` Matthias Brugger
2022-08-04  9:16     ` Tinghan Shen
2022-08-25 13:36   ` Matthias Brugger
2022-07-29  6:31 ` [PATCH v4 06/20] dt-bindings: power: mediatek: Add bindings for MediaTek SCPSYS Tinghan Shen
2022-07-29 22:59   ` Rob Herring
2022-08-02  8:58   ` Krzysztof Kozlowski
2022-08-04  2:05     ` Tinghan Shen
2022-07-29  6:31 ` [PATCH v4 07/20] arm64: dts: mediatek: Update mt81xx scpsys node to align with dt-bindings Tinghan Shen
2022-07-29  6:31 ` [PATCH v4 08/20] arm64: dts: mt8195: Disable watchdog external reset signal Tinghan Shen
2022-07-29  6:31 ` [PATCH v4 09/20] arm64: dts: mt8195: Disable I2C0 node Tinghan Shen
2022-07-29  6:31 ` [PATCH v4 10/20] arm64: dts: mt8195: Add cpufreq node Tinghan Shen
2022-07-29  6:31 ` [PATCH v4 11/20] arm64: dts: mt8195: Add vdosys and vppsys clock nodes Tinghan Shen
2022-07-29  6:32 ` [PATCH v4 12/20] arm64: dts: mt8195: Add power domains controller Tinghan Shen
2022-07-29  6:32 ` [PATCH v4 13/20] arm64: dts: mt8195: Add spmi node Tinghan Shen
2022-07-29  6:32 ` [PATCH v4 14/20] arm64: dts: mt8195: Add scp node Tinghan Shen
2022-07-29  6:32 ` [PATCH v4 15/20] arm64: dts: mt8195: Add audio related nodes Tinghan Shen
2022-07-29  6:32 ` [PATCH v4 16/20] arm64: dts: mt8195: Add adsp node and adsp mailbox nodes Tinghan Shen
2022-07-29  6:32 ` [PATCH v4 17/20] arm64: dts: mt8195: Specify audio reset controller Tinghan Shen
2022-07-29  6:32 ` [PATCH v4 18/20] arm64: dts: mt8195: Add iommu and smi nodes Tinghan Shen
2022-07-29  6:32 ` [PATCH v4 19/20] arm64: dts: mt8195: Add gce node Tinghan Shen
2022-07-29  6:32 ` [PATCH v4 20/20] arm64: dts: mt8195: Add display node for vdosys0 Tinghan Shen

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