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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id em29-20020a0568705b9d00b0010e81e27b99sm2962640oab.17.2022.08.22.07.25.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 07:25:45 -0700 (PDT) Received: (nullmailer pid 3821949 invoked by uid 1000); Mon, 22 Aug 2022 14:25:44 -0000 Date: Mon, 22 Aug 2022 09:25:44 -0500 From: Rob Herring To: Brad Larson Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, adrian.hunter@intel.com, alcooperx@gmail.com, andy.shevchenko@gmail.com, arnd@arndb.de, blarson@amd.com, brijeshkumar.singh@amd.com, catalin.marinas@arm.com, gsomlo@gmail.com, gerg@linux-m68k.org, krzk@kernel.org, krzysztof.kozlowski+dt@linaro.org, lee.jones@linaro.org, broonie@kernel.org, yamada.masahiro@socionext.com, p.zabel@pengutronix.de, piotrs@cadence.com, p.yadav@ti.com, rdunlap@infradead.org, samuel@sholland.org, fancer.lancer@gmail.com, suravee.suthikulpanit@amd.com, thomas.lendacky@amd.com, ulf.hansson@linaro.org, will@kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v6 06/17] dt-bindings: mfd: amd,pensando-elbasr: Add AMD Pensando Elba System Resource chip Message-ID: <20220822142544.GA3770388-robh@kernel.org> References: <20220820195750.70861-1-brad@pensando.io> <20220820195750.70861-7-brad@pensando.io> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220820195750.70861-7-brad@pensando.io> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220822_072555_498428_8E0EC7AE X-CRM114-Status: GOOD ( 24.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, Aug 20, 2022 at 12:57:39PM -0700, Brad Larson wrote: > From: Brad Larson > > Add support for the AMD Pensando Elba SoC System Resource chip > using the SPI interface. The Elba SR is a Multi-function Device > supporting device register access using CS0, smbus interface for > FRU and board peripherals using CS1, dual Lattice I2C masters for > transceiver management using CS2, and CS3 for flash access. > > Signed-off-by: Brad Larson > --- > .../bindings/mfd/amd,pensando-elbasr.yaml | 97 +++++++++++++++++++ > 1 file changed, 97 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/amd,pensando-elbasr.yaml > > diff --git a/Documentation/devicetree/bindings/mfd/amd,pensando-elbasr.yaml b/Documentation/devicetree/bindings/mfd/amd,pensando-elbasr.yaml > new file mode 100644 > index 000000000000..ded347c3352c > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/amd,pensando-elbasr.yaml > @@ -0,0 +1,97 @@ > +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mfd/amd,pensando-elbasr.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: AMD Pensando Elba SoC Resource Controller bindings > + > +description: | > + AMD Pensando Elba SoC Resource Controller is a set of > + miscellaneous control/status registers accessed on CS0, > + a designware i2c master/slave on CS1, a Lattice rd1173 > + dual i2c master on CS2, and flash on CS3. The /dev interfaces > + created are /dev/pensr0.. Hardware reset of the eMMC /dev is a Linux thing and not relevant for the bindings. > + is implemented by a sub-device reset-controller which accesses > + a CS0 control register. > + > +maintainers: > + - Brad Larson > + > +properties: > + compatible: > + items: > + - enum: > + - amd,pensando-elbasr > + > + spi-max-frequency: > + description: Maximum SPI frequency of the device in Hz. No need for generic descriptions of common properties. > + > + reg: > + maxItems: 1 > + > + '#address-cells': > + const: 1 > + > + '#size-cells': > + const: 0 > + > + interrupts: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - spi-max-frequency > + > +patternProperties: > + '^reset-controller@[a-f0-9]+$': > + $ref: /schemas/reset/amd,pensando-elbasr-reset.yaml > + > +additionalProperties: false > + > +examples: > + - | > + #include > + > + spi { > + #address-cells = <1>; > + #size-cells = <0>; > + num-cs = <4>; > + > + sysc: system-controller@0 { > + compatible = "amd,pensando-elbasr"; > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + spi-max-frequency = <12000000>; > + > + rstc: reset-controller@0 { > + compatible = "amd,pensando-elbasr-reset"; > + reg = <0>; What does 0 represent here? A register address within 'elbasr' device? Why do you need a child node for this? Are there other sub-devices and your binding is incomplete? Just put '#reset-cells' in the parent. > + #reset-cells = <1>; > + }; > + }; > + > + i2c1: i2c@1 { > + compatible = "amd,pensando-elbasr"; You can't reuse the same compatible to represent different things. > + reg = <1>; > + spi-max-frequency = <12000000>; > + }; > + > + i2c2: i2c@2 { > + compatible = "amd,pensando-elbasr"; As this is a Lattice RD1173, I would expect a compatible based on that. > + reg = <2>; > + spi-max-frequency = <12000000>; > + interrupt-parent = <&porta>; > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > + }; > + > + flash@3 { > + compatible = "amd,pensando-elbasr"; Isn't this a flash device? > + reg = <3>; > + spi-max-frequency = <12000000>; > + }; > + }; > + > +... > -- > 2.17.1 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel