From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Kristina Martsenko <kristina.martsenko@arm.com>,
linux-arm-kernel@lists.infradead.org,
Mark Brown <broonie@kernel.org>
Subject: [PATCH v5 24/28] arm64/sysreg: Convert ID_AA64PFR0_EL1 to automatic generation
Date: Tue, 30 Aug 2022 11:21:39 +0100 [thread overview]
Message-ID: <20220830102143.1123672-25-broonie@kernel.org> (raw)
In-Reply-To: <20220830102143.1123672-1-broonie@kernel.org>
Automatically generate the constants for ID_AA64PFR0_EL1 as per DDI0487H.a,
no functional changes. The generic defines for the ELx fields are left in
place as they remain useful.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/sysreg.h | 24 ----------
arch/arm64/tools/sysreg | 77 +++++++++++++++++++++++++++++++++
2 files changed, 77 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 62c5c596b18f..2f032ea7e7e8 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -190,7 +190,6 @@
#define SYS_MVFR1_EL1 sys_reg(3, 0, 0, 3, 1)
#define SYS_MVFR2_EL1 sys_reg(3, 0, 0, 3, 2)
-#define SYS_ID_AA64PFR0_EL1 sys_reg(3, 0, 0, 4, 0)
#define SYS_ID_AA64PFR1_EL1 sys_reg(3, 0, 0, 4, 1)
#define SYS_ID_AA64DFR0_EL1 sys_reg(3, 0, 0, 5, 0)
@@ -681,29 +680,6 @@
#define MAIR_ATTRIDX(attr, idx) ((attr) << ((idx) * 8))
/* id_aa64pfr0 */
-#define ID_AA64PFR0_EL1_CSV3_SHIFT 60
-#define ID_AA64PFR0_EL1_CSV2_SHIFT 56
-#define ID_AA64PFR0_EL1_DIT_SHIFT 48
-#define ID_AA64PFR0_EL1_AMU_SHIFT 44
-#define ID_AA64PFR0_EL1_MPAM_SHIFT 40
-#define ID_AA64PFR0_EL1_SEL2_SHIFT 36
-#define ID_AA64PFR0_EL1_SVE_SHIFT 32
-#define ID_AA64PFR0_EL1_RAS_SHIFT 28
-#define ID_AA64PFR0_EL1_GIC_SHIFT 24
-#define ID_AA64PFR0_EL1_AdvSIMD_SHIFT 20
-#define ID_AA64PFR0_EL1_FP_SHIFT 16
-#define ID_AA64PFR0_EL1_EL3_SHIFT 12
-#define ID_AA64PFR0_EL1_EL2_SHIFT 8
-#define ID_AA64PFR0_EL1_EL1_SHIFT 4
-#define ID_AA64PFR0_EL1_EL0_SHIFT 0
-
-#define ID_AA64PFR0_EL1_AMU_IMP 0x1
-#define ID_AA64PFR0_EL1_SVE_IMP 0x1
-#define ID_AA64PFR0_EL1_RAS_IMP 0x1
-#define ID_AA64PFR0_EL1_RAS_V1P1 0x2
-#define ID_AA64PFR0_EL1_FP_NI 0xf
-#define ID_AA64PFR0_EL1_FP_IMP 0x0
-#define ID_AA64PFR0_EL1_AdvSIMD_NI 0xf
#define ID_AA64PFR0_EL1_ELx_64BIT_ONLY 0x1
#define ID_AA64PFR0_EL1_ELx_32BIT_64BIT 0x2
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 2170c9074137..fc32b0649160 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -46,6 +46,83 @@
# feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
# item ACCDATA) though it may be more taseful to do something else.
+Sysreg ID_AA64PFR0_EL1 3 0 0 4 0
+Enum 63:60 CSV3
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Enum 59:56 CSV2
+ 0b0000 NI
+ 0b0001 IMP
+ 0b0010 CSV2_2
+EndEnum
+Enum 55:52 RME
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Enum 51:48 DIT
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Enum 47:44 AMU
+ 0b0000 NI
+ 0b0001 IMP
+ 0b0010 V1P1
+EndEnum
+Enum 43:40 MPAM
+ 0b0000 0
+ 0b0001 1
+EndEnum
+Enum 39:36 SEL2
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Enum 35:32 SVE
+ 0b0000 NI
+ 0b0001 IMP
+EndEnum
+Enum 31:28 RAS
+ 0b0000 NI
+ 0b0001 IMP
+ 0b0010 V1P1
+EndEnum
+Enum 27:24 GIC
+ 0b0000 NI
+ 0b0001 IMP
+ 0b0010 V4P1
+EndEnum
+Enum 23:20 AdvSIMD
+ 0b0000 IMP
+ 0b0001 FP16
+ 0b1111 NI
+EndEnum
+Enum 19:16 FP
+ 0b0000 IMP
+ 0b0001 FP16
+ 0b1111 NI
+EndEnum
+Enum 15:12 EL3
+ 0b0000 NI
+ 0b0001 IMP
+ 0b0010 AARCH32
+EndEnum
+Enum 11:8 EL2
+ 0b0000 NI
+ 0b0001 IMP
+ 0b0010 AARCH32
+EndEnum
+Enum 7:4 EL1
+ 0b0000 NI
+ 0b0001 IMP
+ 0b0010 AARCH32
+EndEnum
+Enum 3:0 EL0
+ 0b0000 NI
+ 0b0001 IMP
+ 0b0010 AARCH32
+EndEnum
+EndSysreg
+
Sysreg ID_AA64ZFR0_EL1 3 0 0 4 4
Res0 63:60
Enum 59:56 F64MM
--
2.30.2
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next prev parent reply other threads:[~2022-08-30 10:48 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-30 10:21 [PATCH v5 00/28] arm64/sysreg: More system register generation Mark Brown
2022-08-30 10:21 ` [PATCH v5 01/28] arm64/sysreg: Remove stray SMIDR_EL1 defines Mark Brown
2022-08-30 10:21 ` [PATCH v5 02/28] arm64/sysreg: Describe ID_AA64SMFR0_EL1.SMEVer as an enumeration Mark Brown
2022-09-02 17:48 ` Kristina Martsenko
2022-08-30 10:21 ` [PATCH v5 03/28] arm64: cache: Remove unused CTR_CACHE_MINLINE_MASK Mark Brown
2022-08-30 10:21 ` [PATCH v5 04/28] arm64/sysreg: Add _EL1 into ID_AA64MMFR0_EL1 definition names Mark Brown
2022-08-30 10:21 ` [PATCH v5 05/28] arm64/sysreg: Add _EL1 into ID_AA64MMFR2_EL1 " Mark Brown
2022-08-30 10:21 ` [PATCH v5 06/28] arm64/sysreg: Add _EL1 into ID_AA64PFR0_EL1 " Mark Brown
2022-08-30 10:21 ` [PATCH v5 07/28] arm64/sysreg: Add _EL1 into ID_AA64PFR1_EL1 constant names Mark Brown
2022-08-30 10:21 ` [PATCH v5 08/28] arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.BigEnd Mark Brown
2022-08-30 10:21 ` [PATCH v5 09/28] arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.ASIDBits Mark Brown
2022-08-30 10:21 ` [PATCH v5 10/28] arm64/sysreg: Standardise naming for ID_AA64MMFR1_EL1 fields Mark Brown
2022-08-30 10:21 ` [PATCH v5 11/28] arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.VARange Mark Brown
2022-09-02 17:53 ` Kristina Martsenko
2022-08-30 10:21 ` [PATCH v5 12/28] arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.CnP Mark Brown
2022-08-30 10:21 ` [PATCH v5 13/28] arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1 constants Mark Brown
2022-08-30 10:21 ` [PATCH v5 14/28] arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1.AdvSIMD constants Mark Brown
2022-08-30 10:21 ` [PATCH v5 15/28] arm64/sysreg: Standardise naming for SSBS feature enumeration Mark Brown
2022-08-30 10:21 ` [PATCH v5 16/28] arm64/sysreg: Standardise naming for MTE " Mark Brown
2022-08-30 10:21 ` [PATCH v5 17/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 fractional version fields Mark Brown
2022-08-30 10:21 ` [PATCH v5 18/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 BTI enumeration Mark Brown
2022-08-30 10:21 ` [PATCH v5 19/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 SME enumeration Mark Brown
2022-08-30 10:21 ` [PATCH v5 20/28] arm64/sysreg: Convert HCRX_EL2 to automatic generation Mark Brown
2022-08-30 10:21 ` [PATCH v5 21/28] arm64/sysreg: Convert ID_AA64MMFR0_EL1 " Mark Brown
2022-09-02 17:58 ` Kristina Martsenko
2022-08-30 10:21 ` [PATCH v5 22/28] arm64/sysreg: Convert ID_AA64MMFR1_EL1 " Mark Brown
2022-08-30 10:21 ` [PATCH v5 23/28] arm64/sysreg: Convert ID_AA64MMFR2_EL1 " Mark Brown
2022-08-30 10:21 ` Mark Brown [this message]
2022-09-02 18:02 ` [PATCH v5 24/28] arm64/sysreg: Convert ID_AA64PFR0_EL1 " Kristina Martsenko
2022-08-30 10:21 ` [PATCH v5 25/28] arm64/sysreg: Convert ID_AA64PFR1_EL1 " Mark Brown
2022-08-30 10:21 ` [PATCH v5 26/28] arm64/sysreg: Convert TIPDR_EL1 " Mark Brown
2022-08-30 10:21 ` [PATCH v5 27/28] arm64/sysreg: Convert SCXTNUM_EL1 " Mark Brown
2022-08-30 10:21 ` [PATCH v5 28/28] arm64/sysreg: Add defintion for ALLINT Mark Brown
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