From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 47933ECAAD5 for ; Tue, 6 Sep 2022 14:52:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Pux91YH1ejsErf2cmd6nyfGJFqoO22g3z9i3IjSdQpI=; b=Gh05mh5earhSjT 1ioagMN9pbDoI0K3Hx103CBG6RehTtSJYEXv9kU5YOS5yEYr49rSFlrJIly5KUDzL2T+hxI6QlApU lAdqloABJ7XKr6szm8AVNydWasCsdDseepD2S8s3Coc+02ZcrpNDFA6efwnkKFyQGXvmyp46wlVrN DmujWWlDSAMkzom00oNqR6hY7HJDvrcqXpsH8ImlIYQuy6evAGXhuLxzinyNodkDIfux02HBrQR2/ 63o5sDLqLTOHg6QHQDzffl9gaeGKeEG17GnRTvIv7TYnzTokxG0rQ8DSrkoqBbFG+IUQ7/8oWKwpW i3K/UcOfc3YXtTCJLbtA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVZvD-00ESmi-P8; Tue, 06 Sep 2022 14:51:28 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVZ54-00E4V1-Qm for linux-arm-kernel@lists.infradead.org; Tue, 06 Sep 2022 13:57:36 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662472654; x=1694008654; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=X/ar3dqdTBAXl4yVl+JbHybkXPhhp+6FzbNlV23f2H0=; b=zg12PFlnyAO2P2m9L4GMA8WNKAZXYdpvZLFuV6ZTnZn7z3jVlHapU/fg jz8njVEbUZ07H/mhZFRJ1v7qYJc5tFgXpEgLdDnIGxziBNo227gTjQHdV DXWEld1p+LSGiHpyQEDdB7Bw8VvkkWhxvATk0rYl1y6+LptdvDQclqC9f 7Vk/fcWoMtd0tgZWziMr439kwrVXI17LrAkQOAWTny6HPi+Bg1XOzX9LN 9cpoa2cMwfhp+NnfFxDhTbI+aYLTRbzQi6thwSUTTfiIvZUWO9Nw2q/1L vWY2hKTp0fhkDYHGu3OBDI+wqiVM3aI7eLUZx5MVDhQAfCau2ysal4f47 Q==; X-IronPort-AV: E=Sophos;i="5.93,294,1654585200"; d="scan'208";a="175830153" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Sep 2022 06:57:30 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Tue, 6 Sep 2022 06:57:21 -0700 Received: from ROB-ULT-M68701.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Tue, 6 Sep 2022 06:57:16 -0700 From: Sergiu Moga To: , , , , , , , , , , , , , , , , CC: , , , , , Subject: [PATCH v2 09/13] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register Date: Tue, 6 Sep 2022 16:55:08 +0300 Message-ID: <20220906135511.144725-10-sergiu.moga@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906135511.144725-1-sergiu.moga@microchip.com> References: <20220906135511.144725-1-sergiu.moga@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_065734_973718_043D32E7 X-CRM114-Status: UNSURE ( 7.14 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add definitions for the Baud Rate Source Clock bitmask of the Mode Register of UART IP's and its bitfields. Signed-off-by: Sergiu Moga --- v1 -> v2: - Nothing, this patch was not here before drivers/tty/serial/atmel_serial.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h index 70d0611e56fd..ed64035ba6c3 100644 --- a/drivers/tty/serial/atmel_serial.h +++ b/drivers/tty/serial/atmel_serial.h @@ -68,6 +68,9 @@ #define ATMEL_US_NBSTOP_1 (0 << 12) #define ATMEL_US_NBSTOP_1_5 (1 << 12) #define ATMEL_US_NBSTOP_2 (2 << 12) +#define ATMEL_UA_BRSRCCK GENMASK(13, 12) /* Clock Selection for UART */ +#define ATMEL_UA_BRSRCCK_PERIPH_CLK (0 << 12) +#define ATMEL_UA_BRSRCCK_GCLK (1 << 12) #define ATMEL_US_CHMODE GENMASK(15, 14) /* Channel Mode */ #define ATMEL_US_CHMODE_NORMAL (0 << 14) #define ATMEL_US_CHMODE_ECHO (1 << 14) -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel