From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7BF2CECAAA1 for ; Tue, 6 Sep 2022 14:56:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=EE/RUbwd1XPzbFOrMAKZDRH9IMVRq6qhVZvPZf8WQ7s=; b=0eBcCiLz1VKbXr O0j6qMZ594CMtlNNXuEO6cJZXHkQLBgS7wMP14JXqCKzXYnv/wuwY/ivnJLnKUVILReUflK91wCOE GjClOK9mlHnwifH4Rx5a9tU2AEvZOrEwXDJy7WKyGsTbM8qDZID4LpGsgNa+A7pCvIKecRyhP40Gq 4izl2alaNS6peAB3Kp6pKEVd6HcIWJvn/aYTH0Sw0NRfC50X6VmY2wpFaRuiSZsVEULrujbwwFV48 W59mnv278q1cgzDyITs1/jQvVzbFL/QlD43OAcLRDLAAufMtsElG9xhwrSCaOFcH/UMian/4JPlCh 62uKjwrJW/4l+4s4jEiQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVZyT-00EU7C-9M; Tue, 06 Sep 2022 14:54:50 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVZ56-00E4V1-Hv for linux-arm-kernel@lists.infradead.org; Tue, 06 Sep 2022 13:57:38 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662472656; x=1694008656; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pk0hBeRzv9yrSvjx77z7pR8KMLbpypDtOQMtHWLcCCU=; b=esbeZAKk42y24umDCqYAk59Yc61pnjuIJzwDyjxxUOFVU/YXPjn2UoJ7 +jR6uQa45nqaHAnwLozWPLbg5ifRCHO3LKt9uaUZIqxpGBIh9pm/cHED3 X0cnV7+QpukC4fh6GvMLyEe+GN+R8nNoJRPTd5XJE/urZJ9+0DHRjpV/e O7gtVaO+RdgtG8csE+D8h8IAKFIMJpLzBoG25w87xhaszgnX+NJEcBLDK A+Ux8z6ul8Hr3vbvRXHr3cbekdaFAembB32EFP090jrMdAF/jx+OFV7kl dIOX4h6/l3SFNCEA4VlevCAbw/fSAMi82J7ktTn+RPagWLmq90ECeR7Mv A==; X-IronPort-AV: E=Sophos;i="5.93,294,1654585200"; d="scan'208";a="175830165" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Sep 2022 06:57:31 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Tue, 6 Sep 2022 06:57:26 -0700 Received: from ROB-ULT-M68701.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Tue, 6 Sep 2022 06:57:21 -0700 From: Sergiu Moga To: , , , , , , , , , , , , , , , , CC: , , , , , Subject: [PATCH v2 10/13] tty: serial: atmel: Only divide Clock Divisor if the IP is USART Date: Tue, 6 Sep 2022 16:55:09 +0300 Message-ID: <20220906135511.144725-11-sergiu.moga@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906135511.144725-1-sergiu.moga@microchip.com> References: <20220906135511.144725-1-sergiu.moga@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_065736_755050_D8F6B113 X-CRM114-Status: GOOD ( 17.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Make sure that the driver only divides the clock divisor if the IP handled at that point is USART, since UART IP's do not support implicit peripheral clock division. Instead, in the case of UART, go with the highest possible clock divisor. Signed-off-by: Sergiu Moga --- v1 -> v2: - Nothing, this patch was not here before and is mainly meant as both cleanup and as a way to introduce a new field into struct atmel_uart_port that will be used by the last patch to diferentiate between USART and UART regarding the location of the Baudrate Clock Source bitmask. drivers/tty/serial/atmel_serial.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index 7450d3853031..6aa01ca5489c 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -150,6 +150,7 @@ struct atmel_uart_port { u32 rts_low; bool ms_irq_enabled; u32 rtor; /* address of receiver timeout register if it exists */ + bool is_usart; bool has_frac_baudrate; bool has_hw_timer; struct timer_list uart_timer; @@ -1825,6 +1826,7 @@ static void atmel_get_ip_name(struct uart_port *port) */ atmel_port->has_frac_baudrate = false; atmel_port->has_hw_timer = false; + atmel_port->is_usart = false; if (name == new_uart) { dev_dbg(port->dev, "Uart with hw timer"); @@ -1834,6 +1836,7 @@ static void atmel_get_ip_name(struct uart_port *port) dev_dbg(port->dev, "Usart\n"); atmel_port->has_frac_baudrate = true; atmel_port->has_hw_timer = true; + atmel_port->is_usart = true; atmel_port->rtor = ATMEL_US_RTOR; version = atmel_uart_readl(port, ATMEL_US_VERSION); switch (version) { @@ -1863,6 +1866,7 @@ static void atmel_get_ip_name(struct uart_port *port) dev_dbg(port->dev, "This version is usart\n"); atmel_port->has_frac_baudrate = true; atmel_port->has_hw_timer = true; + atmel_port->is_usart = true; atmel_port->rtor = ATMEL_US_RTOR; break; case 0x203: @@ -2282,10 +2286,17 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, cd = uart_get_divisor(port, baud); } - if (cd > 65535) { /* BRGR is 16-bit, so switch to slower clock */ + /* + * BRGR is 16-bit, so switch to slower clock. + * Otherwise, keep the highest possible value for the clock divisor. + */ + if (atmel_port->is_usart && cd > 65535) { cd /= 8; mode |= ATMEL_US_USCLKS_MCK_DIV8; + } else { + cd &= 65535; } + quot = cd | fp << ATMEL_US_FP_OFFSET; if (!(port->iso7816.flags & SER_ISO7816_ENABLED)) -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel