From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9758ECAAA1 for ; Tue, 6 Sep 2022 14:44:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MSNLLpwrIhe19kZgZ50uRgPIGooEfxNtMOAH3hqQidk=; b=VC9KeyYGpXMZY0 kILQkgfJeM7BljzEPKuxOhYVIzTnBlcp+pQodWKulpQ46KlqpuT85Nhyw3E7Wn6QmK0GqBLWcEdTP 0WFgaWfgcbRnrpI4VSXCcJaZx9sMBt6pxGd1Np5+DxBtDMXybCD1aZ744unyXEhv0zPs31lSuagmm pShFJjYQRIapinzfXkjqO254hZS3M9AwcDHSi9fUL+D7jCyyIzWtmmCMaKWleYxrt4iCrZx4TurDM 6ZjQ0tQKsbXsxqu+kywtBTVgRy5wVVuAy39QxC6srmyc5mm2Z3R4g3hZfMmSgHX4hcTEq0Nj4Bdy4 KQyAtAGyycxHnf6Y2OQw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVZmc-00EPDj-3T; Tue, 06 Sep 2022 14:42:35 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVZ4C-00E3wa-FS for linux-arm-kernel@lists.infradead.org; Tue, 06 Sep 2022 13:56:41 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662472600; x=1694008600; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=noxCcCO9xTSbTKYwLuG5H1vEfcZMJd3F9cqwqynfP/k=; b=bHJCt/zTfFepfbe/DfSlmCpVhGBhKG3PVBgNH0gjqiPhV0lTBtGfDxbC spDFjzBF7EiRqN6i5T+J0nOLEb7oSSINsD91jJagxghY8oWLjxCmmg3YJ tVBca+45LdqPmLiJZxapeZXacvmex0v/cq4zKizPbP/+TLq26W3Pfr07w wKzIc5Lxz6ub3Q6OTI/8DqGLkipZz7/U7BWe4wDJ9PwtqeRZWsoWP8MAI 1LReWfOBXgZTkcIIbql2Wbxfrq+LLtL+5j5IvdYxaMXMZbzXwVaPTfKY7 QQHUfAa4SK1W49kJ8z7WSr5o9kMdGh/trkHOQ1KslzKr+5VqREFrBNEcI A==; X-IronPort-AV: E=Sophos;i="5.93,294,1654585200"; d="scan'208";a="172589921" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Sep 2022 06:56:39 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Tue, 6 Sep 2022 06:56:38 -0700 Received: from ROB-ULT-M68701.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Tue, 6 Sep 2022 06:56:33 -0700 From: Sergiu Moga To: , , , , , , , , , , , , , , , , CC: , , , , , Subject: [PATCH v2 01/13] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties Date: Tue, 6 Sep 2022 16:55:00 +0300 Message-ID: <20220906135511.144725-2-sergiu.moga@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906135511.144725-1-sergiu.moga@microchip.com> References: <20220906135511.144725-1-sergiu.moga@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_065640_687437_A260450D X-CRM114-Status: UNSURE ( 7.19 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The DT nodes of the SPI IP's may contain DMA related properties so make sure that the binding is able to properly validate those as well by making it aware of these optional properties. Signed-off-by: Sergiu Moga --- v1 -> v2: - Nothing, this patch was not here before .../devicetree/bindings/spi/atmel,at91rm9200-spi.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml index d85d54024b2e..4dd973e341e6 100644 --- a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml +++ b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml @@ -34,6 +34,16 @@ properties: clocks: maxItems: 1 + dmas: + items: + - description: TX DMA Channel + - description: RX DMA Channel + + dma-names: + items: + - const: tx + - const: rx + atmel,fifo-size: $ref: /schemas/types.yaml#/definitions/uint32 description: | -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel