From: Matt Ranostay <mranostay@ti.com>
To: <linux-pci@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>
Cc: <tjoseph@cadence.com>, <vigneshr@ti.com>, <kishon@ti.com>,
Matt Ranostay <mranostay@ti.com>
Subject: [PATCH 0/3] PCI: add 4x lane support for pci-j721e controllers
Date: Fri, 9 Sep 2022 13:16:04 -0700 [thread overview]
Message-ID: <20220909201607.3835-1-mranostay@ti.com> (raw)
Adding of dditional support to Cadence PCIe controller (i.e. pci-j721e.c)
for up to 4x lanes, and reworking of driver to define maximum lanes per
board configuration.
Matt Ranostay (3):
PCI: j721e: Add PCIe 4x lane selection support
PCI: j721e: Add per platform maximum lane settings
PCI: j721e: Add warnings on num-lanes misconfiguration
drivers/pci/controller/cadence/pci-j721e.c | 22 ++++++++++++++++++----
1 file changed, 18 insertions(+), 4 deletions(-)
--
2.37.2
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next reply other threads:[~2022-09-09 20:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-09 20:16 Matt Ranostay [this message]
2022-09-09 20:16 ` [PATCH 1/3] PCI: j721e: Add PCIe 4x lane selection support Matt Ranostay
2022-09-23 9:20 ` Kishon Vijay Abraham I
2022-09-24 23:21 ` Matt Ranostay
2022-09-09 20:16 ` [PATCH 2/3] PCI: j721e: Add per platform maximum lane settings Matt Ranostay
2022-09-09 20:16 ` [PATCH 3/3] PCI: j721e: Add warnings on num-lanes misconfiguration Matt Ranostay
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