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From: Jason-JH.Lin <jason-jh.lin@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: CK Hu <ck.hu@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>,
	"Singo Chang" <singo.chang@mediatek.com>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Jason-JH.Lin <jason-jh.lin@mediatek.com>
Subject: [PATCH v3 6/9] drm/mediatek: Add gamma support different bank_size for other SoC
Date: Sun, 11 Sep 2022 23:37:31 +0800	[thread overview]
Message-ID: <20220911153734.24243-7-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20220911153734.24243-1-jason-jh.lin@mediatek.com>

Add multiple bank support for mt8195.
If bank size is 0 which means no bank support.

Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 45 +++++++++++++----------
 1 file changed, 26 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 155fb5d94d79..9983318e8e3e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -21,6 +21,7 @@
 #define GAMMA_LUT_EN					BIT(1)
 #define GAMMA_DITHERING					BIT(2)
 #define DISP_GAMMA_SIZE				0x0030
+#define DISP_GAMMA_BANK				0x0100
 #define DISP_GAMMA_LUT				0x0700
 
 #define LUT_10BIT_MASK				0x03ff
@@ -33,6 +34,7 @@ struct mtk_disp_gamma_data {
 	bool lut_diff;
 	u16 lut_size;
 	u8 lut_bits;
+	u16 bank_size;
 };
 
 /*
@@ -75,9 +77,10 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
 	struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
 	bool lut_diff = false;
 	u16 lut_size = LUT_SIZE_DEFAULT;
+	u16 bank_size = lut_size;
 	u8 lut_bits = LUT_BITS_DEFAULT;
 	u8 shift_bits;
-	unsigned int i, reg;
+	unsigned int i, j, reg, bank_num;
 	struct drm_color_lut *lut;
 	void __iomem *lut_base;
 	u32 word, mask;
@@ -87,8 +90,10 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
 		lut_diff = gamma->data->lut_diff;
 		lut_size = gamma->data->lut_size;
 		lut_bits = gamma->data->lut_bits;
+		bank_size = gamma->data->bank_size;
 	}
 
+	bank_num = lut_size / bank_size;
 	shift_bits = LUT_INPUT_BITS - lut_bits;
 	mask = GENMASK(lut_bits - 1, 0);
 
@@ -98,25 +103,27 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
 		writel(reg, regs + DISP_GAMMA_CFG);
 		lut_base = regs + DISP_GAMMA_LUT;
 		lut = (struct drm_color_lut *)state->gamma_lut->data;
-		for (i = 0; i < lut_size; i++) {
-
-			if (!lut_diff || (i % 2 == 0)) {
-				word = (((lut[i].red >> shift_bits) & mask) << 20) +
-					(((lut[i].green >> shift_bits) & mask) << 10) +
-					((lut[i].blue >> shift_bits) & mask);
-			} else {
-				diff[0] = (lut[i].red >> shift_bits) -
-					  (lut[i - 1].red >> shift_bits);
-				diff[1] = (lut[i].green >> shift_bits) -
-					  (lut[i - 1].green >> shift_bits);
-				diff[2] = (lut[i].blue >> shift_bits) -
-					  (lut[i - 1].blue >> shift_bits);
-
-				word = ((diff[0] & mask) << 20) +
-					((diff[1] & mask) << 10) +
-					(diff[2] & mask);
+		for (j = 0; j < bank_num; j++) {
+			writel(j, regs + DISP_GAMMA_BANK);
+			for (i = 0; i < bank_size; i++) {
+				if (!lut_diff || (i % 2 == 0)) {
+					word = (((lut[i].red >> shift_bits) & mask) << 20) +
+						(((lut[i].green >> shift_bits) & mask) << 10) +
+						((lut[i].blue >> shift_bits) & mask);
+				} else {
+					diff[0] = (lut[i].red >> shift_bits) -
+						  (lut[i - 1].red >> shift_bits);
+					diff[1] = (lut[i].green >> shift_bits) -
+						  (lut[i - 1].green >> shift_bits);
+					diff[2] = (lut[i].blue >> shift_bits) -
+						  (lut[i - 1].blue >> shift_bits);
+
+					word = ((diff[0] & mask) << 20) +
+						((diff[1] & mask) << 10) +
+						(diff[2] & mask);
+				}
+				writel(word, (lut_base + i * 4));
 			}
-			writel(word, (lut_base + i * 4));
 		}
 	}
 }
-- 
2.18.0


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  parent reply	other threads:[~2022-09-11 15:39 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-11 15:37 [PATCH v3 0/9] Add gamma lut support for mt8195 Jason-JH.Lin
2022-09-11 15:37 ` [PATCH v3 1/9] dt-bindings: mediatek: modify item formatting for gamma Jason-JH.Lin
2022-09-11 15:37 ` [PATCH v3 2/9] dt-bindings: mediatek: Add gamma compatible for mt8195 Jason-JH.Lin
2022-09-11 15:37 ` [PATCH v3 3/9] drm/mediatek: Adjust mtk_drm_gamma_set_common parameters Jason-JH.Lin
2022-09-12 10:12   ` AngeloGioacchino Del Regno
2022-09-14  1:29     ` Jason-JH Lin
2022-09-11 15:37 ` [PATCH v3 4/9] drm/mediatek: Add gamma support different lut_size for other SoC Jason-JH.Lin
2022-09-11 21:10   ` kernel test robot
2022-09-12 10:24   ` AngeloGioacchino Del Regno
2022-09-14  1:33     ` Jason-JH Lin
2022-09-14  1:35     ` Jason-JH Lin
2022-09-11 15:37 ` [PATCH v3 5/9] drm/mediatek: Add gamma support different lut_bits " Jason-JH.Lin
2022-09-12 10:25   ` AngeloGioacchino Del Regno
2022-09-14  1:36     ` Jason-JH Lin
2022-09-11 15:37 ` Jason-JH.Lin [this message]
2022-09-11 15:37 ` [PATCH v3 7/9] drm/mediatek: Add gamma lut support for mt8195 Jason-JH.Lin
2022-09-11 15:37 ` [PATCH v3 8/9] drm/mediatek: Add clear RELAY_MODE bit to set gamma Jason-JH.Lin
2022-09-12 10:26   ` AngeloGioacchino Del Regno
2022-09-14  1:37     ` Jason-JH Lin
2022-09-11 15:37 ` [PATCH v3 9/9] arm64: dts: Modify gamma compatible for mt8195 Jason-JH.Lin

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