From: Sean Anderson <sean.anderson@seco.com>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
linux-phy@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org,
Madalin Bucur <madalin.bucur@nxp.com>,
Ioana Ciornei <ioana.ciornei@nxp.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
devicetree@vger.kernel.org,
Camelia Alexandra Groza <camelia.groza@nxp.com>,
Rob Herring <robh+dt@kernel.org>,
Sean Anderson <sean.anderson@seco.com>,
Li Yang <leoyang.li@nxp.com>, Shawn Guo <shawnguo@kernel.org>
Subject: [PATCH v6 5/8] arm64: dts: ls1046a: Add serdes bindings
Date: Tue, 20 Sep 2022 16:23:53 -0400 [thread overview]
Message-ID: <20220920202356.1451033-6-sean.anderson@seco.com> (raw)
In-Reply-To: <20220920202356.1451033-1-sean.anderson@seco.com>
This adds bindings for the SerDes devices. They are disabled by default
to prevent any breakage on existing boards.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v4)
Changes in v4:
- Convert to new bindings
Changes in v3:
- Describe modes in device tree
Changes in v2:
- Use one phy cell for SerDes1, since no lanes can be grouped
- Disable SerDes by default to prevent breaking boards inadvertently.
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index feab604322cf..48d81c6e1cfb 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -421,6 +421,24 @@ sfp: efuse@1e80000 {
clock-names = "sfp";
};
+ serdes1: serdes@1ea0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #clock-cells = <1>;
+ compatible = "fsl,ls1046a-serdes", "fsl,lynx-10g";
+ reg = <0x0 0x1ea0000 0x0 0x2000>;
+ status = "disabled";
+ };
+
+ serdes2: serdes@1eb0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #clock-cells = <1>;
+ compatible = "fsl,ls1046a-serdes", "fsl,lynx-10g";
+ reg = <0x0 0x1eb0000 0x0 0x2000>;
+ status = "disabled";
+ };
+
dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1046a-dcfg", "syscon";
reg = <0x0 0x1ee0000 0x0 0x1000>;
--
2.35.1.1320.gc452695387.dirty
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next prev parent reply other threads:[~2022-09-20 20:27 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-20 20:23 [PATCH v6 0/8] phy: Add support for Lynx 10G SerDes Sean Anderson
2022-09-20 20:23 ` [PATCH v6 1/8] dt-bindings: phy: Add 2500BASE-X and 10GBASE-R Sean Anderson
2022-09-20 20:23 ` [PATCH v6 2/8] dt-bindings: phy: Add Lynx 10G phy binding Sean Anderson
2022-09-21 6:57 ` Krzysztof Kozlowski
2022-09-22 15:23 ` Sean Anderson
2022-09-22 16:00 ` Krzysztof Kozlowski
2022-09-22 16:00 ` Krzysztof Kozlowski
2022-09-20 20:23 ` [PATCH v6 3/8] dt-bindings: clock: Add ids for Lynx 10g PLLs Sean Anderson
2022-09-29 0:37 ` Stephen Boyd
2022-09-20 20:23 ` [PATCH v6 4/8] phy: fsl: Add Lynx 10G SerDes driver Sean Anderson
2022-09-24 6:54 ` Vinod Koul
2022-09-26 15:35 ` Sean Anderson
2022-10-03 17:04 ` Sean Anderson
2022-09-20 20:23 ` Sean Anderson [this message]
2022-09-20 20:23 ` [PATCH v6 6/8] arm64: dts: ls1088a: Add serdes bindings Sean Anderson
2022-09-20 20:23 ` [PATCH v6 7/8] arm64: dts: ls1046ardb: " Sean Anderson
2022-09-20 20:23 ` [PATCH v6 8/8] [WIP] arm64: dts: ls1088ardb: " Sean Anderson
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