From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EBD0CC54EE9 for ; Wed, 21 Sep 2022 03:17:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6wSqZI1ixmjBfGYKPjhDz69dPOF5YBHTdNUQzkOvfRo=; b=nMK/fNrvnkCjze URQeKWqdzlWjZtxLZY2SE01YReKw3wh6d6nXgcnvbVkVvnBDZzPSic9z1kGeZamgO9dHZR9BxiO8G vNkzyQ8WeAVOl8/UbvxZDxSeyWlhjoNjpM2F66voKpwvXYFcqcWqg3lCrrKT6DOHTzto/xDAd5WfB mIzDMTzHVMHVSddHcyJ98Rmbk674MvQj+4AzuhamRXvB2+PU2+p1L9Td9bJK+qRXSOevGsNztPMcq L5pcLEL7N28srOC2o6k/z/hG9hd05+yb1X5BrVl7gOeKyduiKwUNmk4Wq+etx1nJ0y3GUzouQPlWE /k/Pp7LoCOQmb62VaEQw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oaqDL-008TJu-EI; Wed, 21 Sep 2022 03:15:56 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oaqBY-008SVE-Nc for linux-arm-kernel@lists.infradead.org; Wed, 21 Sep 2022 03:14:06 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 28L3E2Ox049781; Tue, 20 Sep 2022 22:14:02 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1663730042; bh=y2al6hjZb8dqRZ9ZTNFs31cv/SPNzLg+OmGkDoiB1Mc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=bfcEVE51XSLNEODtO5AlMOD8ZjzF5FYO5fMWtLU/qOR8I1p7Y7UHTmhhRgjMPD0aD rNJMXqiCtBL1CqGy3QrB3qGFrSBi6jtWJCfPfuHY/LerX/B2Jc4IFvtjMCgloyciEs bS9ogOGxOMXlxO7J/p2zMt/UbU2LVKzy4obMyNIw= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 28L3E24I118124 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 20 Sep 2022 22:14:02 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 20 Sep 2022 22:14:02 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 20 Sep 2022 22:14:02 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28L3Dx3N063245; Tue, 20 Sep 2022 22:14:01 -0500 From: Matt Ranostay To: , , CC: , , Subject: [PATCH v3 9/9] arm64: dts: ti: k3-j721s2-common-proc-board: Enable PCIe Date: Tue, 20 Sep 2022 20:13:27 -0700 Message-ID: <20220921031327.4135-10-mranostay@ti.com> X-Mailer: git-send-email 2.38.0.rc0.52.gdda7228a83 In-Reply-To: <20220921031327.4135-1-mranostay@ti.com> References: <20220921031327.4135-1-mranostay@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220920_201404_869841_707708EF X-CRM114-Status: GOOD ( 10.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Aswath Govindraju x1 lane PCIe slot in the common processor board is enabled and connected to J721S2 SOM. Add PCIe DT node in common processor board to reflect the same. Signed-off-by: Aswath Govindraju Signed-off-by: Vignesh Raghavendra --- .../boot/dts/ti/k3-j721s2-common-proc-board.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index cb99a97af426..793ee77838f4 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -428,6 +428,20 @@ flash@0{ }; }; +&pcie1_rc { + reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; + phys = <&serdes0_pcie_link>; + phy-names = "pcie-phy"; + num-lanes = <1>; +}; + +&pcie1_ep { + phys = <&serdes0_pcie_link>; + phy-names = "pcie-phy"; + num-lanes = <1>; + status = "disabled"; +}; + &mcu_mcan0 { pinctrl-names = "default"; pinctrl-0 = <&mcu_mcan0_pins_default>; -- 2.37.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel