From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: mturquette@baylibre.com, sboyd@kernel.org
Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
matthias.bgg@gmail.com, p.zabel@pengutronix.de,
y.oudjana@protonmail.com,
angelogioacchino.delregno@collabora.com,
jason-jh.lin@mediatek.com, ck.hu@mediatek.com,
fparent@baylibre.com, rex-bc.chen@mediatek.com,
tinghan.shen@mediatek.com, ikjn@chromium.org,
miles.chen@mediatek.com, sam.shih@mediatek.com,
wenst@chromium.org, bgolaszewski@baylibre.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org,
konrad.dybcio@somainline.org, marijn.suijten@somainline.org,
martin.botka@somainline.org,
~postmarketos/upstreaming@lists.sr.ht,
phone-devel@vger.kernel.org, kernel@collabora.com,
Rob Herring <robh@kernel.org>
Subject: [RESEND PATCH v6 3/8] dt-bindings: reset: Add bindings for MT6795 Helio X10 reset controllers
Date: Wed, 21 Sep 2022 11:14:50 +0200 [thread overview]
Message-ID: <20220921091455.41327-4-angelogioacchino.delregno@collabora.com> (raw)
In-Reply-To: <20220921091455.41327-1-angelogioacchino.delregno@collabora.com>
Add the reset controller bindings for MT6795.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../reset/mediatek,mt6795-resets.h | 53 +++++++++++++++++++
1 file changed, 53 insertions(+)
create mode 100644 include/dt-bindings/reset/mediatek,mt6795-resets.h
diff --git a/include/dt-bindings/reset/mediatek,mt6795-resets.h b/include/dt-bindings/reset/mediatek,mt6795-resets.h
new file mode 100644
index 000000000000..5464a4a79a70
--- /dev/null
+++ b/include/dt-bindings/reset/mediatek,mt6795-resets.h
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2022 Collabora Ltd.
+ * Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT6795
+#define _DT_BINDINGS_RESET_CONTROLLER_MT6795
+
+/* INFRACFG resets */
+#define MT6795_INFRA_RST0_SCPSYS_RST 0
+#define MT6795_INFRA_RST0_PMIC_WRAP_RST 1
+#define MT6795_INFRA_RST1_MIPI_DSI_RST 2
+#define MT6795_INFRA_RST1_MIPI_CSI_RST 3
+#define MT6795_INFRA_RST1_MM_IOMMU_RST 4
+
+/* MMSYS resets */
+#define MT6795_MMSYS_SW0_RST_B_SMI_COMMON 0
+#define MT6795_MMSYS_SW0_RST_B_SMI_LARB 1
+#define MT6795_MMSYS_SW0_RST_B_CAM_MDP 2
+#define MT6795_MMSYS_SW0_RST_B_MDP_RDMA0 3
+#define MT6795_MMSYS_SW0_RST_B_MDP_RDMA1 4
+#define MT6795_MMSYS_SW0_RST_B_MDP_RSZ0 5
+#define MT6795_MMSYS_SW0_RST_B_MDP_RSZ1 6
+#define MT6795_MMSYS_SW0_RST_B_MDP_RSZ2 7
+#define MT6795_MMSYS_SW0_RST_B_MDP_TDSHP0 8
+#define MT6795_MMSYS_SW0_RST_B_MDP_TDSHP1 9
+#define MT6795_MMSYS_SW0_RST_B_MDP_WDMA 10
+#define MT6795_MMSYS_SW0_RST_B_MDP_WROT0 11
+#define MT6795_MMSYS_SW0_RST_B_MDP_WROT1 12
+#define MT6795_MMSYS_SW0_RST_B_MDP_CROP 13
+
+/* PERICFG resets */
+#define MT6795_PERI_NFI_SW_RST 0
+#define MT6795_PERI_THERM_SW_RST 1
+#define MT6795_PERI_MSDC1_SW_RST 2
+
+/* TOPRGU resets */
+#define MT6795_TOPRGU_INFRA_SW_RST 0
+#define MT6795_TOPRGU_MM_SW_RST 1
+#define MT6795_TOPRGU_MFG_SW_RST 2
+#define MT6795_TOPRGU_VENC_SW_RST 3
+#define MT6795_TOPRGU_VDEC_SW_RST 4
+#define MT6795_TOPRGU_IMG_SW_RST 5
+#define MT6795_TOPRGU_DDRPHY_SW_RST 6
+#define MT6795_TOPRGU_MD_SW_RST 7
+#define MT6795_TOPRGU_INFRA_AO_SW_RST 8
+#define MT6795_TOPRGU_MD_LITE_SW_RST 9
+#define MT6795_TOPRGU_APMIXED_SW_RST 10
+#define MT6795_TOPRGU_PWRAP_SPI_CTL_RST 11
+#define MT6795_TOPRGU_SW_RST_NUM 12
+
+#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT6795 */
--
2.37.2
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next prev parent reply other threads:[~2022-09-21 9:19 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-21 9:14 [RESEND PATCH v6 0/8] MediaTek Helio X10 MT6795 - Clock drivers AngeloGioacchino Del Regno
2022-09-21 9:14 ` [RESEND PATCH v6 1/8] dt-bindings: mediatek: Document MT6795 system controllers bindings AngeloGioacchino Del Regno
2022-09-21 9:14 ` [RESEND PATCH v6 2/8] dt-bindings: clock: Add MediaTek Helio X10 MT6795 clock bindings AngeloGioacchino Del Regno
2022-09-21 9:14 ` AngeloGioacchino Del Regno [this message]
2022-09-21 9:14 ` [RESEND PATCH v6 4/8] dt-bindings: clock: mediatek: Add clock driver bindings for MT6795 AngeloGioacchino Del Regno
2022-09-21 9:14 ` [RESEND PATCH v6 5/8] clk: mediatek: clk-apmixed: Remove unneeded __init annotation AngeloGioacchino Del Regno
2022-09-21 9:14 ` [RESEND PATCH v6 6/8] clk: mediatek: Export required symbols to compile clk drivers as module AngeloGioacchino Del Regno
2022-09-21 9:14 ` [RESEND PATCH v6 7/8] clk: mediatek: clk-apmixed: Add helper function to unregister ref2usb_tx AngeloGioacchino Del Regno
2022-09-26 3:01 ` Chen-Yu Tsai
2022-09-21 9:14 ` [RESEND PATCH v6 8/8] clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers AngeloGioacchino Del Regno
2022-09-26 4:45 ` [RESEND PATCH v6 0/8] MediaTek Helio X10 MT6795 - Clock drivers Chen-Yu Tsai
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