From: Will Deacon <will@kernel.org>
To: Liao Chang <liaochang1@huawei.com>
Cc: catalin.marinas@arm.com, guoren@kernel.org,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, rostedt@goodmis.org, mhiramat@kernel.org,
maz@kernel.org, alexandru.elisei@arm.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH V2 3/3] arm64/kprobe: Optimize the performance of patching single-step slot
Date: Thu, 22 Sep 2022 14:38:51 +0100 [thread overview]
Message-ID: <20220922133850.GC12095@willie-the-truck> (raw)
In-Reply-To: <20220913033454.104519-4-liaochang1@huawei.com>
On Tue, Sep 13, 2022 at 11:34:54AM +0800, Liao Chang wrote:
> Single-step slot would not be used until kprobe is enabled, that means
> no race condition occurs on it under SMP, hence it is safe to pacth ss
> slot without stopping machine.
>
> Signed-off-by: Liao Chang <liaochang1@huawei.com>
> ---
> arch/arm64/kernel/probes/kprobes.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/kernel/probes/kprobes.c b/arch/arm64/kernel/probes/kprobes.c
> index d1d182320245..5902e33fd3b6 100644
> --- a/arch/arm64/kernel/probes/kprobes.c
> +++ b/arch/arm64/kernel/probes/kprobes.c
> @@ -44,11 +44,10 @@ post_kprobe_handler(struct kprobe *, struct kprobe_ctlblk *, struct pt_regs *);
> static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
> {
> kprobe_opcode_t *addr = p->ainsn.api.insn;
> - void *addrs[] = {addr, addr + 1};
> - u32 insns[] = {p->opcode, BRK64_OPCODE_KPROBES_SS};
>
> /* prepare insn slot */
> - aarch64_insn_patch_text(addrs, insns, 2);
> + aarch64_insn_write(addr, p->opcode);
> + aarch64_insn_write(addr + 1, BRK64_OPCODE_KPROBES_SS);
>
> flush_icache_range((uintptr_t)addr, (uintptr_t)(addr + MAX_INSN_SIZE));
Hmm, so it looks like prior to your change we were doing the cache
maintebnance twice: once in aarch64_insn_patch_text() from stop machine
context and then again in the flush_icache_range() call above.
I suppose the cleanest thing would be to drop the flush_icache_range()
call and then use aarch64_insn_patch_text_nosync() instead of
aarch64_insn_write() in your change.
Will
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next prev parent reply other threads:[~2022-09-22 13:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-13 3:34 [PATCH V2 0/3] kprobe: Optimize the performance of patching ss Liao Chang
2022-09-13 3:34 ` [PATCH V2 1/3] riscv/kprobe: Optimize the performance of patching single-step slot Liao Chang
2022-09-13 3:34 ` [PATCH V2 2/3] csky/kprobe: " Liao Chang
2022-09-13 3:34 ` [PATCH V2 3/3] arm64/kprobe: " Liao Chang
2022-09-22 13:38 ` Will Deacon [this message]
2022-09-23 1:24 ` liaochang (A)
2022-09-13 11:19 ` [PATCH V2 0/3] kprobe: Optimize the performance of patching ss Masami Hiramatsu
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