From: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
To: Lee Jones <lee@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: <Project_Global_Chrome_Upstream_Group@mediatek.com>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>, <hsinyi@chromium.org>,
Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Subject: [PATCH 5/5] arm64: dts: mt8186: Add xhci nodes
Date: Fri, 23 Sep 2022 21:11:48 +0800 [thread overview]
Message-ID: <20220923131148.6678-6-allen-kh.cheng@mediatek.com> (raw)
In-Reply-To: <20220923131148.6678-1-allen-kh.cheng@mediatek.com>
Add xhci nodes for mt8186 SoC.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 41 ++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c6809fdc7d15..b08af431e525 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -845,6 +845,26 @@
status = "disabled";
};
+ xhci0: usb@11200000 {
+ compatible = "mediatek,mt8186-xhci",
+ "mediatek,mtk-xhci";
+ reg = <0 0x11200000 0 0x1000>,
+ <0 0x11203e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ interrupts = <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH 0>;
+ phys = <&u2port0 PHY_TYPE_USB2>;
+ clocks = <&topckgen CLK_TOP_USB_TOP>,
+ <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,
+ <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,
+ <&infracfg_ao CLK_INFRA_AO_ICUSB>,
+ <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_XHCI>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
+ power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>;
+ mediatek,syscon-wakeup = <&pericfg 0x420 2>;
+ wakeup-source;
+ status = "disabled";
+ };
+
mmc0: mmc@11230000 {
compatible = "mediatek,mt8186-mmc",
"mediatek,mt8183-mmc";
@@ -875,6 +895,27 @@
status = "disabled";
};
+ xhci1: usb@11280000 {
+ compatible = "mediatek,mt8186-xhci",
+ "mediatek,mtk-xhci";
+ reg = <0 0x11280000 0 0x1000>,
+ <0 0x11283e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 0>;
+ phys = <&u2port1 PHY_TYPE_USB2>,
+ <&u3port1 PHY_TYPE_USB3>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
+ <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
+ <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,
+ <&clk26m>,
+ <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_XHCI>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck","xhci_ck";
+ power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>;
+ mediatek,syscon-wakeup = <&pericfg 0x424 2>;
+ wakeup-source;
+ status = "disabled";
+ };
+
u3phy0: t-phy@11c80000 {
compatible = "mediatek,mt8186-tphy",
"mediatek,generic-tphy-v2";
--
2.18.0
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next prev parent reply other threads:[~2022-09-23 13:13 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-23 13:11 [PATCH 0/5] Add some driver nodes for MT8186 SoC Allen-KH Cheng
2022-09-23 13:11 ` [PATCH 1/5] dt-bindings: mfd: mediatek: Add scpsys compatible for mt8186 Allen-KH Cheng
2022-09-23 17:47 ` Krzysztof Kozlowski
2022-09-26 7:48 ` Lee Jones
2022-09-23 13:11 ` [PATCH 2/5] arm64: dts: mt8186: Add power domains controller Allen-KH Cheng
2022-09-27 13:47 ` AngeloGioacchino Del Regno
2022-09-23 13:11 ` [PATCH 3/5] arm64: dts: mt8186: Add IOMMU and SMI nodes Allen-KH Cheng
2022-09-27 13:40 ` AngeloGioacchino Del Regno
2022-09-27 13:53 ` Allen-KH Cheng (程冠勳)
2022-09-23 13:11 ` [PATCH 4/5] arm64: dts: mt8186: Add dpi node Allen-KH Cheng
2022-09-23 13:11 ` Allen-KH Cheng [this message]
2022-09-27 13:48 ` [PATCH 5/5] arm64: dts: mt8186: Add xhci nodes AngeloGioacchino Del Regno
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