From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 57F44C433F5 for ; Fri, 30 Sep 2022 14:09:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/huHCVVR0thpLEy0WBQwmflbr9VBzRXgAAb46uT/odA=; b=dNTfnBsTK78WN8 AjmYJfiSLEjcdokTGfSOq0jrkEY+puZqTu71muqow4Hg44kAnWh6VapGBj8mwHUAU2XsfNFd1suWh ZZyVbktU+o463QkyNuBVzEfj5wus9rMgvbf9m3SLToIUKUZmOAduqg9F772HuIxYzHNtRcvlpw0vk Amv58Keh3yIkdh2SDrAXd9JtSEkwjOB++0g//w8QKb+3OaPSs5wVIsX3XiuvDGPaCyVfiYO1KTZQ1 6nACyQLROraeOvAeyBlGoSalzzQHFUkFK0hkm+DmgohmvZz94QkLLvF33lZu7ed0bZKr9z0EkN7Aj 0wkXAqValaj8q6cGCD+A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oeGhD-009aB0-OT; Fri, 30 Sep 2022 14:08:56 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oeGb3-009X0u-Ua for linux-arm-kernel@lists.infradead.org; Fri, 30 Sep 2022 14:02:35 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3897A1BD0; Fri, 30 Sep 2022 07:02:39 -0700 (PDT) Received: from eglon.cambridge.arm.com (eglon.cambridge.arm.com [10.1.197.78]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F23D93F792; Fri, 30 Sep 2022 07:02:31 -0700 (PDT) From: James Morse To: linux-arm-kernel@lists.infradead.org Cc: Mark Brown , james.morse@arm.com Subject: [RFC PATCH 13/38] arm64/sysreg: Standardise naming for MVFR0_EL1 Date: Fri, 30 Sep 2022 15:01:46 +0100 Message-Id: <20220930140211.3215348-14-james.morse@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220930140211.3215348-1-james.morse@arm.com> References: <20220930140211.3215348-1-james.morse@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220930_070234_051195_F78F4EAE X-CRM114-Status: GOOD ( 11.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org To convert the 32bit id registers to use the sysreg generation, they must first have a regular pattern, to match the symbols the script generates. Ensure symbols for the MVFR0_EL1 register use lower-case for feature names where the arm-arm does the same. No functional change. Signed-off-by: James Morse --- arch/arm64/include/asm/sysreg.h | 16 ++++++++-------- arch/arm64/kernel/cpufeature.c | 4 ++-- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 5f889f3d2c7e..60642d9bc673 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -769,14 +769,14 @@ #define ID_PFR2_EL1_SSBS_SHIFT 4 #define ID_PFR2_EL1_CSV3_SHIFT 0 -#define MVFR0_FPROUND_SHIFT 28 -#define MVFR0_FPSHVEC_SHIFT 24 -#define MVFR0_FPSQRT_SHIFT 20 -#define MVFR0_FPDIVIDE_SHIFT 16 -#define MVFR0_FPTRAP_SHIFT 12 -#define MVFR0_FPDP_SHIFT 8 -#define MVFR0_FPSP_SHIFT 4 -#define MVFR0_SIMD_SHIFT 0 +#define MVFR0_EL1_FPRound_SHIFT 28 +#define MVFR0_EL1_FPShVec_SHIFT 24 +#define MVFR0_EL1_FPSqrt_SHIFT 20 +#define MVFR0_EL1_FPDivide_SHIFT 16 +#define MVFR0_EL1_FPTrap_SHIFT 12 +#define MVFR0_EL1_FPDP_SHIFT 8 +#define MVFR0_EL1_FPSP_SHIFT 4 +#define MVFR0_EL1_SIMDReg_SHIFT 0 #define MVFR1_SIMDFMAC_SHIFT 28 #define MVFR1_FPHP_SHIFT 24 diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 1567b32ae03e..b2fc4a6d738a 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2816,8 +2816,8 @@ static const struct arm64_cpu_capabilities compat_elf_hwcaps[] = { HWCAP_CAP_MATCH(compat_has_neon, CAP_COMPAT_HWCAP, COMPAT_HWCAP_NEON), HWCAP_CAP(SYS_MVFR1_EL1, MVFR1_SIMDFMAC_SHIFT, 4, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFPv4), /* Arm v8 mandates MVFR0.FPDP == {0, 2}. So, piggy back on this for the presence of VFP support */ - HWCAP_CAP(SYS_MVFR0_EL1, MVFR0_FPDP_SHIFT, 4, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFP), - HWCAP_CAP(SYS_MVFR0_EL1, MVFR0_FPDP_SHIFT, 4, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFPv3), + HWCAP_CAP(SYS_MVFR0_EL1, MVFR0_EL1_FPDP_SHIFT, 4, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFP), + HWCAP_CAP(SYS_MVFR0_EL1, MVFR0_EL1_FPDP_SHIFT, 4, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFPv3), HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_EL1_AES_SHIFT, 4, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_PMULL), HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_EL1_AES_SHIFT, 4, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_AES), HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_EL1_SHA1_SHIFT, 4, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA1), -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel