From: Sascha Hauer <s.hauer@pengutronix.de>
To: linux-usb@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
Peter Chen <peter.chen@kernel.org>,
Peng Fan <peng.fan@oss.nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
devicetree@vger.kernel.org, Sascha Hauer <s.hauer@pengutronix.de>
Subject: [PATCH 6/6] dt-bindings: usb: ci-hdrc-usb2: Add more phy tuning properties
Date: Tue, 11 Oct 2022 10:29:24 +0200 [thread overview]
Message-ID: <20221011082924.884123-7-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20221011082924.884123-1-s.hauer@pengutronix.de>
Following the example of samsung,picophy-dc-vol-level-adjust more
phy tuning properties are added for configuring the remaining bitfields
in the USBNC_n_PHY_CFG1 register.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
.../devicetree/bindings/usb/ci-hdrc-usb2.yaml | 79 +++++++++++++++++++
1 file changed, 79 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
index 11d08ffeb1e9c..c467924235759 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
@@ -255,15 +255,94 @@ allOf:
minimum: 0x0
maximum: 0x3
+ samsung,picophy-usb-source-impedance-adjust:
+ description: |
+ USB Source Impedance Adjustment. In some applications, there can be
+ significant series resistance on the USB DP/DN path between the
+ USB_OTG*_DP/USB_OTG*_DN pins tns and the USB cable. This bus adjusts
+ the driver source impedance to compensate for that added resistance.
+ The default value is 0x1. For more details refer to TXRESTUNE0 bits of
+ USBNC_n_PHY_CFG1.
+
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x3
+
+ samsung,picophy-hs-rise-time-adjust:
+ description: |
+ This bus adjust the rise/fall times of the high-speed transmitter
+ waveform. The default value is 0x1. For more details refer to
+ TXRISETUNE0 bits of USBNC_n_PHY_CFG1.
+
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x3
+
samsung,picophy-dc-vol-level-adjust:
description: |
HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC
level voltage. The range is from 0x0 to 0xf, the default value is
0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
+
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0xf
+
+ samsung,picophy-fs-ls-source-impedance-adjust:
+ description: |
+ FS/LS Source Impedance Adjustment. This bus adjusts the low- and
+ full-speed single-ended source impedance while driving high. The
+ adjustment values listed are based on nominal process, voltage, and
+ temperature conditions. The default value is 0x3. For more details
+ refer to TXFSLSTUNE0 bits of USBNC_n_PHY_CFG1.
+
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0x0
maximum: 0xf
+ samsung,picophy-transmitter-hs-crossover-adjust:
+ description: |
+ Transmitter High-Speed Crossover Adjustment. This bus adjusts the
+ voltage at which the USB_OTG*_DP and USB_OTG*_DN signals cross
+ while transmitting in HS mode. The default value is 0x3. For more
+ details refer to TXHSXVTUNE0 bits of USBNC_n_PHY_CFG1.
+
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x3
+
+ samsung,picophy-vbus-valid-threshold-adjust:
+ description: |
+ VBUS Valid Threshold Adjustment. This bus adjust the voltage level
+ for the VBUS VALID threshold. The default value is 0x4. For more
+ details refer to OTGTUNE0 bits of USBNC_n_PHY_CFG1.
+
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x7
+
+ samsung,picophy-squelsh-threshold-adjust:
+ description: |
+ Squelch Threshold Adjustment. This bus adjusts the voltage level for
+ the receiver threshold used to detect valid high-speed data. The
+ default value is 0x3. For more details refer to SQRXTUNE0 bits of
+ USBNC_n_PHY_CFG1.
+
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x7
+
+ samsung,picophy-disconnect-threshold-adjust:
+ description: |
+ Disconnect Threshold Adjustment. This bus adjusts the voltage level for
+ the receiver threshold used to detect a disconnect event at the host.
+ The default value is 0x4. For more details refer to COMPDISTUNE0 bits of
+ USBNC_n_PHY_CFG1.
+
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x7
+
additionalProperties: true
examples:
--
2.30.2
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next prev parent reply other threads:[~2022-10-11 8:31 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-11 8:29 [PATCH 0/6] usb: chipidea: Export more phy tuning parameters to device tree Sascha Hauer
2022-10-11 8:29 ` [PATCH 1/6] usb: chipidea: usbmisc_imx: Fix i.MX53 clock sel masks Sascha Hauer
2022-10-18 8:45 ` Xu Yang
2022-10-11 8:29 ` [PATCH 2/6] usb: chipidea: usbmisc_imx: Fix setting i.MX6SX wakeup source Sascha Hauer
2022-10-18 8:46 ` Xu Yang
2022-10-11 8:29 ` [PATCH 3/6] usb: chipidea: usbmisc_imx: Use GENMASK/FIELD_PREP for bitfields Sascha Hauer
2022-10-18 8:39 ` xu yang
2022-10-11 8:29 ` [PATCH 4/6] usb: chipidea: usbmisc_imx: Add prefix to register defines Sascha Hauer
2022-10-18 8:49 ` Xu Yang
2022-10-11 8:29 ` [PATCH 5/6] usb: chipidea: usbmisc_imx: Add device tree properties for i.MX7 phy tuning Sascha Hauer
2022-10-11 8:29 ` Sascha Hauer [this message]
2022-10-12 16:08 ` [PATCH 6/6] dt-bindings: usb: ci-hdrc-usb2: Add more phy tuning properties Rob Herring
2022-10-13 10:14 ` Sascha Hauer
2022-10-13 20:03 ` Rob Herring
2022-10-17 0:41 ` [PATCH 0/6] usb: chipidea: Export more phy tuning parameters to device tree Peter Chen
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