From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0D9A6C433FE for ; Fri, 18 Nov 2022 14:11:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Bo2/BpCFAQ9GXXbb5OEL6W1tZyj8qD7UE/4zxThR7Nw=; b=Fm6kvyKgWMdxeV tqaHZRtY9z0WXkKQMFoUxOGugZgq/04CNsSkACckSSR3MB+urgU2+nB4tdVFSYDjXnIik5OXIQmqh Ksbv6S69XXEiViy5aQEPhR2/ekTO5Wg4BAowALpKoEedoMEMwWwMS4UItP3/CwYHV6YMOubhu//MU QD99fN/7lfomzpz8oW9FKcKvReUkNW74oQncX+AYjbX1khZq+ZTidmAZ3Fb7coHZcPjhL6sGC6fX7 rjhq5BX85aocXmM79oc5NKc1b6jppR28mERX3u65tWbprr/ko1RtETcSATj97ScCFfkyquetAxDX4 fEixBjQrBcO92lF64n+g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ow24y-004K2U-Pv; Fri, 18 Nov 2022 14:10:52 +0000 Received: from madras.collabora.co.uk ([46.235.227.172]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ow24v-004JyS-Ah; Fri, 18 Nov 2022 14:10:51 +0000 Received: from notapiano (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id AAFAA6602A3B; Fri, 18 Nov 2022 14:10:43 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1668780645; bh=pRPLysf0FJETMjuGSkgqfys84EBTLQ8RPJqmeUpzLus=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=hPDjIVrjv+RcBBumuWkCUzkAJKbmtQJSvAVRHQJDzBuEhgWdBss5qhwg/aj+UO+uT jSy2KjzAuFvp77R98uQBiVXDGgC2TZ1EpWn0IoMIreoHlxO001spqMe8+IfhKaUHNT HVzPV5uhKpFFZoncWs6Oo2i//qZszII2CKvzuoLNfHzK7cWc41qhL2/VoXFuXkQKM7 fqcXar9iztIYLbcddpGHfR0CkUBKCmFnSviQIfbdDoT/T4a/jtJsGfuFz2rB517LrQ A4YWZEA6qlRb6YMqvbh0JDQQjYXgMa/Zo6Ke6I22b29XITeMFDtajeRSVztdKa7f65 lHteVNz0/JSzg== Date: Fri, 18 Nov 2022 09:10:39 -0500 From: =?utf-8?B?TsOtY29sYXMgRi4gUi4gQS4=?= Prado To: Allen-KH Cheng Cc: Mauro Carvalho Chehab , Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Project_Global_Chrome_Upstream_Group@mediatek.com, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: Re: [PATCH v4 2/2] arm64: dts: mt8192: Add vcodec lat and core nodes Message-ID: <20221118141039.y2ap7dzdp26ih2la@notapiano> References: <20220930112237.14411-1-allen-kh.cheng@mediatek.com> <20220930112237.14411-3-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220930112237.14411-3-allen-kh.cheng@mediatek.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221118_061049_740883_79327EEA X-CRM114-Status: GOOD ( 17.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Sep 30, 2022 at 07:22:37PM +0800, Allen-KH Cheng wrote: > Add vcodec lat and core nodes for mt8192 SoC. > = > Signed-off-by: Allen-KH Cheng > Tested-by: Chen-Yu Tsai > Reviewed-by: AngeloGioacchino Del Regno > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 60 ++++++++++++++++++++++++ > 1 file changed, 60 insertions(+) > = > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/d= ts/mediatek/mt8192.dtsi > index 6b20376191a7..92a20f87468b 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -1449,6 +1449,66 @@ > power-domains =3D <&spm MT8192_POWER_DOMAIN_ISP2>; > }; > = > + vcodec_dec: video-codec@16000000 { > + compatible =3D "mediatek,mt8192-vcodec-dec"; > + reg =3D <0 0x16000000 0 0x1000>; > + mediatek,scp =3D <&scp>; > + iommus =3D <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>; > + dma-ranges =3D <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>; Hi, since commit 951d48855d86 ("of: Make of_dma_get_range() work on bus nodes")= [1] was merged this no longer works as is. Running the fluster codec tests resu= lts in IOMMU faults: [ 386.233976] mtk-iommu 1401d000.m4u: fault type=3D0x280 iova=3D0x1fcdc00= 00 pa=3D0x0 master=3D0x500041c(larb=3D4 port=3D7) layer=3D0 read [ 386.250666] mtk_vdec_worker(),241: [MTK_V4L2][ERROR] <=3D=3D=3D[138], = src_buf[0] sz=3D0x298 pts=3D0 vdec_if_decode() ret=3D1 res_chg=3D0=3D=3D=3D> The issue is that the DMA configuration supplied by dma-ranges is now looke= d for in the parent node, so the vcodec_dec node no longer gets the configuration= it expected. That said, given that the node already uses the IOMMU for the address translations (iommus property), there shouldn't even be a dma-ranges proper= ty. Indeed simply removing the dma-ranges property from this node fixes the iss= ue and gets the decoder working again. Thanks, N=EDcolas [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/comm= it/?id=3Df1ad5338a4d57fe1fe6475003acb8c70bf9d1bdf > + #address-cells =3D <2>; > + #size-cells =3D <2>; > + ranges =3D <0 0 0 0x16000000 0 0x26000>; > + > + video-codec-lat@10000 { > + compatible =3D "mediatek,mtk-vcodec-lat"; > + reg =3D <0x0 0x10000 0 0x800>; > + interrupts =3D ; > + iommus =3D <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD_EXT>, > + <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD2_EXT>, > + <&iommu0 M4U_PORT_L5_VDEC_LAT0_AVC_MV_EXT>, > + <&iommu0 M4U_PORT_L5_VDEC_LAT0_PRED_RD_EXT>, > + <&iommu0 M4U_PORT_L5_VDEC_LAT0_TILE_EXT>, > + <&iommu0 M4U_PORT_L5_VDEC_LAT0_WDMA_EXT>, > + <&iommu0 M4U_PORT_L5_VDEC_LAT0_RG_CTRL_DMA_EXT>, > + <&iommu0 M4U_PORT_L5_VDEC_UFO_ENC_EXT>; > + clocks =3D <&topckgen CLK_TOP_VDEC_SEL>, > + <&vdecsys_soc CLK_VDEC_SOC_VDEC>, > + <&vdecsys_soc CLK_VDEC_SOC_LAT>, > + <&vdecsys_soc CLK_VDEC_SOC_LARB1>, > + <&topckgen CLK_TOP_MAINPLL_D4>; > + clock-names =3D "sel", "soc-vdec", "soc-lat", "vdec", "top"; > + assigned-clocks =3D <&topckgen CLK_TOP_VDEC_SEL>; > + assigned-clock-parents =3D <&topckgen CLK_TOP_MAINPLL_D4>; > + power-domains =3D <&spm MT8192_POWER_DOMAIN_VDEC>; > + }; > + > + video-codec-core@25000 { > + compatible =3D "mediatek,mtk-vcodec-core"; > + reg =3D <0 0x25000 0 0x1000>; > + interrupts =3D ; > + iommus =3D <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>, > + <&iommu0 M4U_PORT_L4_VDEC_UFO_EXT>, > + <&iommu0 M4U_PORT_L4_VDEC_PP_EXT>, > + <&iommu0 M4U_PORT_L4_VDEC_PRED_RD_EXT>, > + <&iommu0 M4U_PORT_L4_VDEC_PRED_WR_EXT>, > + <&iommu0 M4U_PORT_L4_VDEC_PPWRAP_EXT>, > + <&iommu0 M4U_PORT_L4_VDEC_TILE_EXT>, > + <&iommu0 M4U_PORT_L4_VDEC_VLD_EXT>, > + <&iommu0 M4U_PORT_L4_VDEC_VLD2_EXT>, > + <&iommu0 M4U_PORT_L4_VDEC_AVC_MV_EXT>, > + <&iommu0 M4U_PORT_L4_VDEC_RG_CTRL_DMA_EXT>; > + clocks =3D <&topckgen CLK_TOP_VDEC_SEL>, > + <&vdecsys CLK_VDEC_VDEC>, > + <&vdecsys CLK_VDEC_LAT>, > + <&vdecsys CLK_VDEC_LARB1>, > + <&topckgen CLK_TOP_MAINPLL_D4>; > + clock-names =3D "sel", "soc-vdec", "soc-lat", "vdec", "top"; > + assigned-clocks =3D <&topckgen CLK_TOP_VDEC_SEL>; > + assigned-clock-parents =3D <&topckgen CLK_TOP_MAINPLL_D4>; > + power-domains =3D <&spm MT8192_POWER_DOMAIN_VDEC2>; > + }; > + }; > + _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel