From: Samuel Holland <samuel@sholland.org>
To: Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Samuel Holland <samuel@sholland.org>,
Andre Przywara <andre.przywara@arm.com>,
Conor Dooley <conor@kernel.org>,
Heiko Stuebner <heiko.stuebner@vrull.eu>,
Palmer Dabbelt <palmer@dabbelt.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-sunxi@lists.linux.dev,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v2 1/3] dt-bindings: power: Add Allwinner D1 PPU
Date: Thu, 26 Jan 2023 00:34:17 -0600 [thread overview]
Message-ID: <20230126063419.15971-2-samuel@sholland.org> (raw)
In-Reply-To: <20230126063419.15971-1-samuel@sholland.org>
The Allwinner D1 family of SoCs contain a PPU power domain controller
separate from the PRCM. It can power down the video engine and DSP, and
it contains special logic for hardware-assisted CPU idle. Other recent
Allwinner SoCs (e.g. TV303) have a PPU with a different set of domains.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Changes in v2:
- Removed quotes from "PPU"
- Fixed indentation in binding example
.../power/allwinner,sun20i-d1-ppu.yaml | 54 +++++++++++++++++++
.../power/allwinner,sun20i-d1-ppu.h | 10 ++++
2 files changed, 64 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
create mode 100644 include/dt-bindings/power/allwinner,sun20i-d1-ppu.h
diff --git a/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
new file mode 100644
index 000000000000..46e2647a5d72
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/allwinner,sun20i-d1-ppu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner SoCs PPU power domain controller
+
+maintainers:
+ - Samuel Holland <samuel@sholland.org>
+
+description:
+ D1 and related SoCs contain a power domain controller for the CPUs, GPU, and
+ video-related hardware.
+
+properties:
+ compatible:
+ enum:
+ - allwinner,sun20i-d1-ppu
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ description: Bus Clock
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ '#power-domain-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - resets
+ - '#power-domain-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/sun20i-d1-r-ccu.h>
+ #include <dt-bindings/reset/sun20i-d1-r-ccu.h>
+
+ ppu: power-controller@7001000 {
+ compatible = "allwinner,sun20i-d1-ppu";
+ reg = <0x7001000 0x1000>;
+ clocks = <&r_ccu CLK_BUS_R_PPU>;
+ resets = <&r_ccu RST_BUS_R_PPU>;
+ #power-domain-cells = <1>;
+ };
diff --git a/include/dt-bindings/power/allwinner,sun20i-d1-ppu.h b/include/dt-bindings/power/allwinner,sun20i-d1-ppu.h
new file mode 100644
index 000000000000..23cfb57256d6
--- /dev/null
+++ b/include/dt-bindings/power/allwinner,sun20i-d1-ppu.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+
+#ifndef _DT_BINDINGS_POWER_SUN20I_D1_PPU_H_
+#define _DT_BINDINGS_POWER_SUN20I_D1_PPU_H_
+
+#define PD_CPU 0
+#define PD_VE 1
+#define PD_DSP 2
+
+#endif /* _DT_BINDINGS_POWER_SUN20I_D1_PPU_H_ */
--
2.37.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-01-26 6:35 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-26 6:34 [PATCH v2 0/3] Allwinner D1 power domain support Samuel Holland
2023-01-26 6:34 ` Samuel Holland [this message]
2023-01-26 6:34 ` [PATCH v2 2/3] soc: sunxi: Add Allwinner D1 PPU driver Samuel Holland
2023-01-26 6:34 ` [PATCH v2 3/3] riscv: dts: allwinner: d1: Add power controller node Samuel Holland
2023-01-27 22:17 ` Jernej Škrabec
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230126063419.15971-2-samuel@sholland.org \
--to=samuel@sholland.org \
--cc=andre.przywara@arm.com \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=heiko.stuebner@vrull.eu \
--cc=jernej.skrabec@gmail.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=krzysztof.kozlowski@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-sunxi@lists.linux.dev \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=robh+dt@kernel.org \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).