From: Shuai Xue <xueshuai@linux.alibaba.com>
To: helgaas@kernel.org, yangyicong@huawei.com, will@kernel.org,
Jonathan.Cameron@huawei.com, baolin.wang@linux.alibaba.com,
robin.murphy@arm.com
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
rdunlap@infradead.org, mark.rutland@arm.com,
zhuo.song@linux.alibaba.com, xueshuai@linux.alibaba.com
Subject: [PATCH v4 1/4] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver
Date: Tue, 16 May 2023 21:01:07 +0800 [thread overview]
Message-ID: <20230516130110.59632-2-xueshuai@linux.alibaba.com> (raw)
In-Reply-To: <20220917121036.14864-1-xueshuai@linux.alibaba.com>
Alibaba's T-Head Yitan 710 SoC is built on Synopsys' widely deployed and
silicon-proven DesignWare Core PCIe controller which implements PMU for
performance and functional debugging to facilitate system maintenance.
Document it to provide guidance on how to use it.
Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com>
---
.../admin-guide/perf/dwc_pcie_pmu.rst | 61 +++++++++++++++++++
Documentation/admin-guide/perf/index.rst | 1 +
2 files changed, 62 insertions(+)
create mode 100644 Documentation/admin-guide/perf/dwc_pcie_pmu.rst
diff --git a/Documentation/admin-guide/perf/dwc_pcie_pmu.rst b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst
new file mode 100644
index 000000000000..0672e959ebe4
--- /dev/null
+++ b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst
@@ -0,0 +1,61 @@
+======================================================================
+Synopsys DesignWare Cores (DWC) PCIe Performance Monitoring Unit (PMU)
+======================================================================
+
+DesignWare Cores (DWC) PCIe PMU
+===============================
+
+To facilitate collection of statistics, Synopsys DesignWare Cores PCIe
+controller provides the following two features:
+
+- Time Based Analysis (RX/TX data throughput and time spent in each
+ low-power LTSSM state)
+- Lane Event counters (Error and Non-Error for lanes)
+
+The PMU is not a PCIe Root Complex integrated End Point (RCiEP) device but
+only register counters provided by each PCIe Root Port.
+
+Time Based Analysis
+-------------------
+
+Using this feature you can obtain information regarding RX/TX data
+throughput and time spent in each low-power LTSSM state by the controller.
+
+The counters are 64-bit width and measure data in two categories,
+
+- percentage of time does the controller stay in LTSSM state in a
+ configurable duration. The measurement range of each Event in Group#0.
+- amount of data processed (Units of 16 bytes). The measurement range of
+ each Event in Group#1.
+
+Lane Event counters
+-------------------
+
+Using this feature you can obtain Error and Non-Error information in
+specific lane by the controller.
+
+The counters are 32-bit width and the measured event is select by:
+
+- Group i
+- Event j within the Group i
+- and Lane k
+
+Some of the event counters only exist for specific configurations.
+
+DesignWare Cores (DWC) PCIe PMU Driver
+=======================================
+
+This driver add PMU devices for each PCIe Root Port. And the PMU device is
+named based the BDF of Root Port. For example,
+
+ 30:03.0 PCI bridge: Device 1ded:8000 (rev 01)
+
+the PMU device name for this Root Port is dwc_rootport_3018.
+
+Example usage of counting PCIe RX TLP data payload (Units of 16 bytes)::
+
+ $# perf stat -a -e dwc_rootport_3018/Rx_PCIe_TLP_Data_Payload/
+
+average RX bandwidth can be calculated like this:
+
+ PCIe TX Bandwidth = PCIE_TX_DATA * 16B / Measure_Time_Window
diff --git a/Documentation/admin-guide/perf/index.rst b/Documentation/admin-guide/perf/index.rst
index 9de64a40adab..11a80cd28a2e 100644
--- a/Documentation/admin-guide/perf/index.rst
+++ b/Documentation/admin-guide/perf/index.rst
@@ -19,5 +19,6 @@ Performance monitor support
arm_dsu_pmu
thunderx2-pmu
alibaba_pmu
+ dwc_pcie_pmu
nvidia-pmu
meson-ddr-pmu
--
2.20.1.12.g72788fdb
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next prev parent reply other threads:[~2023-05-16 13:02 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-17 12:10 [PATCH v1 0/3] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Shuai Xue
2022-09-17 12:10 ` [PATCH v1 1/3] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver Shuai Xue
2022-09-22 13:25 ` Will Deacon
2022-09-23 13:51 ` Shuai Xue
2022-11-07 15:28 ` Will Deacon
2022-09-23 1:27 ` Yicong Yang
2022-09-23 14:47 ` Shuai Xue
2022-09-17 12:10 ` [PATCH v1 2/3] drivers/perf: add " Shuai Xue
2022-09-22 15:58 ` Jonathan Cameron
2022-09-22 17:32 ` Bjorn Helgaas
2022-09-23 3:35 ` Yicong Yang
2022-09-23 10:56 ` Jonathan Cameron
2022-09-23 13:45 ` Shuai Xue
2022-09-23 15:54 ` Jonathan Cameron
2022-09-26 13:31 ` Shuai Xue
2022-09-26 14:32 ` Robin Murphy
2022-09-26 17:18 ` Bjorn Helgaas
2022-09-27 5:13 ` Shuai Xue
2022-09-27 10:04 ` Jonathan Cameron
2022-09-27 10:14 ` Robin Murphy
2022-09-27 12:49 ` Shuai Xue
2022-09-27 13:39 ` Jonathan Cameron
2022-09-27 12:29 ` Shuai Xue
2022-09-27 10:03 ` Jonathan Cameron
2022-09-22 17:36 ` Bjorn Helgaas
2022-09-23 14:46 ` Shuai Xue
2022-09-23 18:51 ` Bjorn Helgaas
2022-09-27 6:01 ` Shuai Xue
2022-09-23 3:30 ` Yicong Yang
2022-09-23 15:43 ` Shuai Xue
2022-09-24 8:00 ` Yicong Yang
2022-09-26 11:39 ` Shuai Xue
2022-09-17 12:10 ` [PATCH v1 3/3] MAINTAINERS: add maintainers for " Shuai Xue
2023-04-10 3:16 ` [PATCH v2 0/3] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Shuai Xue
2023-04-10 3:17 ` [PATCH v2 1/3] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver Shuai Xue
2023-04-10 3:17 ` [PATCH v2 2/3] drivers/perf: add " Shuai Xue
2023-04-10 7:25 ` kernel test robot
2023-04-11 3:17 ` Baolin Wang
2023-04-17 1:16 ` Shuai Xue
2023-04-18 1:51 ` Baolin Wang
2023-04-19 1:39 ` Shuai Xue
2023-04-10 3:17 ` [PATCH v2 3/3] MAINTAINERS: add maintainers for " Shuai Xue
2023-04-17 6:17 ` [PATCH v3 0/3] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Shuai Xue
2023-04-17 6:17 ` [PATCH v3 1/3] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver Shuai Xue
2023-05-16 14:32 ` Jonathan Cameron
2023-05-17 1:27 ` Shuai Xue
2023-04-17 6:17 ` [PATCH v3 2/3] drivers/perf: add " Shuai Xue
2023-04-18 23:30 ` Robin Murphy
2023-04-27 6:33 ` Shuai Xue
2023-05-16 15:03 ` Jonathan Cameron
2023-05-16 19:17 ` Bjorn Helgaas
2023-05-17 9:54 ` Jonathan Cameron
2023-05-17 16:27 ` Bjorn Helgaas
2023-05-19 10:08 ` Shuai Xue
2023-04-17 6:17 ` [PATCH v3 3/3] MAINTAINERS: add maintainers for " Shuai Xue
2023-05-16 13:01 ` [PATCH v4 0/4] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Shuai Xue
2023-05-16 13:01 ` Shuai Xue [this message]
2023-05-16 13:01 ` [PATCH v4 2/4] PCI: move Alibaba Vendor ID linux/pci_ids.h Shuai Xue
2023-05-16 13:01 ` [PATCH v4 3/4] drivers/perf: add DesignWare PCIe PMU driver Shuai Xue
2023-05-16 19:19 ` Bjorn Helgaas
2023-05-17 2:35 ` Shuai Xue
[not found] ` <202305170639.XU3djFZX-lkp@intel.com>
2023-05-17 3:37 ` Shuai Xue
2023-05-16 13:01 ` [PATCH v4 4/4] MAINTAINERS: add maintainers for " Shuai Xue
2023-05-22 3:54 ` [PATCH v5 0/4] drivers/perf: add Synopsys DesignWare PCIe PMU driver support Shuai Xue
2023-05-22 14:28 ` Jonathan Cameron
2023-05-23 2:57 ` Shuai Xue
2023-05-22 3:54 ` [PATCH v5 1/4] docs: perf: Add description for Synopsys DesignWare PCIe PMU driver Shuai Xue
2023-05-29 3:45 ` Baolin Wang
2023-05-29 6:31 ` Shuai Xue
2023-05-22 3:54 ` [PATCH v5 2/4] PCI: move Alibaba Vendor ID linux/pci_ids.h Shuai Xue
2023-05-22 16:04 ` Bjorn Helgaas
2023-05-23 3:22 ` Shuai Xue
2023-05-23 11:54 ` Bjorn Helgaas
2023-05-23 12:49 ` Shuai Xue
2023-05-22 3:54 ` [PATCH v5 3/4] drivers/perf: add DesignWare PCIe PMU driver Shuai Xue
2023-05-29 6:13 ` Baolin Wang
2023-05-29 6:33 ` Shuai Xue
2023-05-22 3:54 ` [PATCH v5 4/4] MAINTAINERS: add maintainers for " Shuai Xue
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