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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id n8sm28902799wrx.42.2020.01.16.04.00.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Jan 2020 04:00:57 -0800 (PST) Subject: Re: [RFC PATCH v1 2/3] dt-bindings: mmc: convert synopsys dw-mshc bindings to yaml To: Rob Herring References: <20200114213809.27166-1-jbx6244@gmail.com> <20200114213809.27166-2-jbx6244@gmail.com> From: Johan Jonker Message-ID: <203e9217-9aa8-b65e-4411-2d9b23c1362a@gmail.com> Date: Thu, 16 Jan 2020 13:00:55 +0100 User-Agent: Mozilla/5.0 (X11; Linux i686; rv:68.0) Gecko/20100101 Thunderbird/68.3.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200116_040059_946390_D341528F X-CRM114-Status: GOOD ( 15.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Ulf Hansson , "heiko@sntech.de" , linux-mmc , "linux-kernel@vger.kernel.org" , "open list:ARM/Rockchip SoC..." , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org See below. On 1/15/20 4:18 PM, Rob Herring wrote: > On Tue, Jan 14, 2020 at 3:38 PM Johan Jonker wrote: >> > [...] > >> diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml >> new file mode 100644 >> index 000000000..6f85a21d0 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml >> @@ -0,0 +1,88 @@ >> +# SPDX-License-Identifier: GPL-2.0 >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Synopsys Designware Mobile Storage Host Controller Binding [..] >> +examples: >> + # The MSHC controller node can be split into two portions, SoC specific and >> + # board specific portions as listed below. > > This split doesn't work because the examples are built and validated > now. It may happen to because all the props are optional, but the > board hunk goes unchecked. So please combine. > Hi, I have no knowledge about this particular hardware to give a realistic example. Could someone advise here? Or should I just use the first example for now? Thanks >> + - | >> + dwmmc0@12200000 { >> + compatible = "snps,dw-mshc"; >> + clocks = <&clock 351>, <&clock 132>; >> + clock-names = "biu", "ciu"; >> + reg = <0x12200000 0x1000>; >> + interrupts = <0 75 0>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + data-addr = <0x200>; >> + fifo-watermark-aligned; >> + resets = <&rst 20>; >> + reset-names = "reset"; >> + }; >> + # [board specific internal DMA resources] >> + - | >> + dwmmc0@12200000 { >> + clock-frequency = <400000000>; >> + clock-freq-min-max = <400000 200000000>; >> + broken-cd; >> + fifo-depth = <0x80>; >> + card-detect-delay = <200>; >> + vmmc-supply = <&buck8>; >> + bus-width = <8>; >> + cap-mmc-highspeed; >> + cap-sd-highspeed; >> + }; >> + # [board specific generic DMA request binding] >> + - | >> + dwmmc0@12200000 { >> + clock-frequency = <400000000>; >> + clock-freq-min-max = <400000 200000000>; >> + broken-cd; >> + fifo-depth = <0x80>; >> + card-detect-delay = <200>; >> + vmmc-supply = <&buck8>; >> + bus-width = <8>; >> + cap-mmc-highspeed; >> + cap-sd-highspeed; >> + dmas = <&pdma 12>; >> + dma-names = "rx-tx"; >> + }; >> -- >> 2.11.0 >> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel