From: Samuel Holland <samuel@sholland.org>
To: Anup Patel <anup.patel@wdc.com>
Cc: Sandeep Tripathy <milun.tripathy@gmail.com>,
Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Liush <liush@allwinnertech.com>, Anup Patel <anup@brainfault.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Albert Ou <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Pavel Machek <pavel@ucw.cz>
Subject: Re: [PATCH v5 6/8] cpuidle: Add RISC-V SBI CPU idle driver
Date: Sun, 6 Jun 2021 13:39:43 -0500 [thread overview]
Message-ID: <26cddfa8-75e2-7b5b-1a47-e01cc1c7821e@sholland.org> (raw)
In-Reply-To: <20210602112321.2241566-7-anup.patel@wdc.com>
On 6/2/21 6:23 AM, Anup Patel wrote:
> The RISC-V SBI HSM extension provides HSM suspend call which can
> be used by Linux RISC-V to enter platform specific low-power state.
>
> This patch adds a CPU idle driver based on RISC-V SBI calls which
> will populate idle states from device tree and use SBI calls to
> entry these idle states.
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
> ---
> MAINTAINERS | 7 +
> drivers/cpuidle/Kconfig | 5 +
> drivers/cpuidle/Kconfig.riscv | 15 +
> drivers/cpuidle/Makefile | 4 +
> drivers/cpuidle/cpuidle-sbi.c | 626 ++++++++++++++++++++++++++++++++++
> 5 files changed, 657 insertions(+)
> create mode 100644 drivers/cpuidle/Kconfig.riscv
> create mode 100644 drivers/cpuidle/cpuidle-sbi.c
>
> ...
> diff --git a/drivers/cpuidle/cpuidle-sbi.c b/drivers/cpuidle/cpuidle-sbi.c
> new file mode 100644
> index 000000000000..f743684d07de
> --- /dev/null
> +++ b/drivers/cpuidle/cpuidle-sbi.c
> @@ -0,0 +1,626 @@
> ...
> + /* Initialize idle states from DT. */
> + ret = sbi_cpuidle_dt_init_states(dev, drv, cpu, state_count);
> + if (ret) {
> + pr_err("HART%ld: failed to init idle states\n",
> + cpuid_to_hartid_map(cpu));
> + return ret;
> + }
> +
> + ret = cpuidle_register(drv, NULL);
> + if (ret)
> + goto deinit;
> +
> + cpuidle_cooling_register(drv);
> +
> + return 0;
> +deinit:
> + sbi_cpuidle_deinit_cpu(cpu);
> + return ret;
> +}
> +
> +static int sbi_cpuidle_pd_power_off(struct generic_pm_domain *pd)
This function should be moved inside the CONFIG_DT_IDLE_GENPD block
below. Otherwise it is defined but unused.
> +{
> + struct genpd_power_state *state = &pd->states[pd->state_idx];
> + u32 *pd_state;
> +
> + if (!state->data)
> + return 0;
> +
> + if (!sbi_cpuidle_pd_allow_domain_state)
> + return -EBUSY;
> +
> + /* OSI mode is enabled, set the corresponding domain state. */
> + pd_state = state->data;
> + sbi_set_domain_state(*pd_state);
> +
> + return 0;
> +}
> +
> +static void sbi_cpuidle_domain_sync_state(struct device *dev)
> +{
> + /*
> + * All devices have now been attached/probed to the PM domain
> + * topology, hence it's fine to allow domain states to be picked.
> + */
> + sbi_cpuidle_pd_allow_domain_state = true;
> +}
> +
> +#ifdef CONFIG_DT_IDLE_GENPD
> +
> +struct sbi_pd_provider {
> + struct list_head link;
> + struct device_node *node;
> +};
> +
> +static LIST_HEAD(sbi_pd_providers);
> +
> +static int sbi_pd_init(struct device_node *np)
> +{
> + struct generic_pm_domain *pd;
> + struct sbi_pd_provider *pd_provider;
> + struct dev_power_governor *pd_gov;
> + int ret = -ENOMEM, state_count = 0;
> +
> + pd = dt_idle_pd_alloc(np, sbi_dt_parse_state_node);
> + if (!pd)
> + goto out;
> ...
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next prev parent reply other threads:[~2021-06-06 18:41 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-02 11:23 [PATCH v5 0/8] RISC-V CPU Idle Support Anup Patel
2021-06-02 11:23 ` [PATCH v5 1/8] RISC-V: Enable CPU_IDLE drivers Anup Patel
2021-06-02 11:23 ` [PATCH v5 2/8] RISC-V: Rename relocate() and make it global Anup Patel
2021-06-02 11:23 ` [PATCH v5 3/8] RISC-V: Add arch functions for non-retentive suspend entry/exit Anup Patel
2021-06-02 11:23 ` [PATCH v5 4/8] RISC-V: Add SBI HSM suspend related defines Anup Patel
2021-06-02 11:23 ` [PATCH v5 5/8] cpuidle: Factor-out power domain related code from PSCI domain driver Anup Patel
2021-06-02 13:17 ` Ulf Hansson
2021-06-02 15:06 ` Anup Patel
2021-06-06 18:34 ` Samuel Holland
2021-06-09 8:01 ` Anup Patel
2021-06-02 11:23 ` [PATCH v5 6/8] cpuidle: Add RISC-V SBI CPU idle driver Anup Patel
2021-06-06 18:39 ` Samuel Holland [this message]
2021-06-09 10:36 ` Anup Patel
2021-06-02 11:23 ` [PATCH v5 7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states Anup Patel
2021-06-02 11:23 ` [PATCH v5 8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine Anup Patel
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